| 研究生: |
紀傑晟 Chi, Chieh-Cheng |
|---|---|
| 論文名稱: |
暫態電壓抑制器的模擬與製作 A Study on Transient Voltage Suppressor Simulation and Fabrication |
| 指導教授: |
林家民
Lin, Jai-Ming |
| 共同指導: |
李文熙
Lee, Wen-Shi |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2012 |
| 畢業學年度: | 100 |
| 語文別: | 中文 |
| 論文頁數: | 106 |
| 中文關鍵詞: | 靜電放電 、暫態電壓抑制器 、P-N接面 |
| 外文關鍵詞: | Electrosatic Discharge, TVS, P-N Junction |
| 相關次數: | 點閱:135 下載:0 |
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本論文所研究的元件為暫態電壓抑制器(Transient Voltage Suppressor, TVS),暫態電壓抑制器為現今靜電防護元件的發展主流。首先我們使用Silvaco TCAD模擬無磊晶層雙向式TVS,經由TCAD的模擬結果觀察、分析在改變摻雜濃度與改變光罩距離時元件的電性變化。使用Tanner L-Edit做光罩設計,並對實際下線的元件做量測結果討論,比較軟體模擬與實際下線元件的差異性。最後利用Hspice電路分析模擬軟體比較TVS陣列電路與一般二極體陣列電路在靜電防護效能上的差異性。
The device in this thesis is Transient Voltage Suppressor(TVS). TVS is the mainstream of today's ESD protection devices. First, we simulated Non-Epitaxy layer bi-directional TVS by Silvaco TCAD. In the experiment of TCAD simulation, we observed and analyzed the variation of electrical characteristics when the doping concentration and the mask distance were changed.
This experiment also used Tanner L-edit designing layout and measurement results and discussions of layout devices to compare software simulation with the actual layout devices. Finally, we used Hspice circuit simulation software to compare TVS array with general diodes array to find out the differences in the performance of electrostatic protection.
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