| 研究生: |
莊旭銘 Chuang, Hsu-Ming |
|---|---|
| 論文名稱: |
一個可保留影像邊緣特性的雜訊移除演算法及其硬體實作 An Edge-Preserved Image Denoising Algorithm and Its VLSI Implementation |
| 指導教授: |
陳培殷
Chen, Pei-Yin |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 資訊工程學系 Department of Computer Science and Information Engineering |
| 論文出版年: | 2007 |
| 畢業學年度: | 95 |
| 語文別: | 中文 |
| 論文頁數: | 62 |
| 中文關鍵詞: | 脈衝雜訊 |
| 外文關鍵詞: | Impulse Noise, VLSI |
| 相關次數: | 點閱:78 下載:2 |
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如何有效的移除影像上的雜訊及重建影像,是本論文要解決的問題。一般而言,突波雜訊移除演算法分為兩個階段,突波雜訊偵測與影像重建。在本論文中,我們提出了一個能保留影像邊緣特性的雜訊移除演算法及其硬體實作,並針對成本的考量,提供一個較低硬體成本的設計。
本論文所提出的去雜訊演算法首先尋找最有可能有邊緣線存在的邊緣方向,利用所偵測出的邊緣線來預測影像位於此點的像素值,並依據此資訊進行雜訊點的判斷以及影像像素的重建。在較低硬體成本的設計中,雜訊偵測部份利用遮罩中最亮點和最暗點及其像素值變化量來進行雜訊偵測,接著尋找可能存在的邊緣線來重建影像的像素值。實驗結果顯示我們的方法不論在原始演算法或是低硬體成本的考量下,都有優異的表現,特別是在對於高雜訊比率毀損影像的重建成效更為卓著。此外,我們分別提出了這兩個方法的管線化VLSI架構,使用CIC所提供的Artisan TSMC 0.35 製程的模擬數據顯示每秒處理量可以達到70百萬像素/秒的速度,所提出的演算法約六千個左右的邏輯閘,低成本考量的設計只需要四千個左右的邏輯閘。
We propose a method to solve the problem that how to detect the noise and reconstruct the corrupted pixel value efficiently in this thesis. Generally speaking, impulse noise suppression algorithm can be separated into two stages, noise detection and noise removal. In this thesis, two edge-preserved image denoising methods and their VLSI implementations are presented: cost-effective denoising method and high performance one.
The first method utilizes the extreme data in the mask of the processed pixels and their variations to determine whether the current pixel is corrupted by impulse noise or not. Then we reconstruct the noisy pixel. The second method predicts the value of current processed pixel, and uses it to determine whether the current pixel is corrupted or not and then reconstruct the corrupted pixel. The experimental result shows that our method achieves excellent performance under both cost and performance consideration, especially when the image is under heavy corruption. We also propose the pipelined VLSI architectures of these two algorithms. The simulation results show that the two architectures can both achieve the throughput rate of 70M pixels/sec by using 4K and 6K gates, respectively, with Artisan TSMC 0.35 cell library.
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