在系統單晶片技術中，內嵌式震盪器不需要外部的晶體震盪器電路，因此能夠降低生產成本以及節省印刷電路板的面積。然而晶片內嵌式震盪器的參考頻率卻會隨著製程、電源電壓、溫度的漂移而改變。因此我們提出兩種架構的設計，都不需要使用雙載子接面電晶體或者任何外部元件。第一個設計是具有電流補償技巧的參考震盪器，佈局後的模擬結果顯示最大的頻率漂移是12%。在第二個設計中，我們使用一個適應性偏壓電路去補償製程跟溫度造成的頻率漂移，即使在最差的條件下，頻率漂移還是可以維持在5%以內。所提出的參考震盪器能提供良好的內嵌式參考時脈訊號給系統單晶片。

In system-on-chip (SoC) technology, on-chip oscillators eliminate the need for an external crystal oscillator circuit, reduce production cost and decrease printed circuit board size. However, on-chip reference frequencies suffer from process, supply voltage, and temperature (PVT) variations. Therefore, we propose two architectures without bipolar junction transistors (BJTs) or any external component. The first design is a current compensated reference oscillator. The post-layout simulation shows that the maximum frequency variation is 12%. In the second design, we use an adaptive biasing circuit to compensate for process and temperature deviation. Even in the worst case, the frequency variation is under 5%. The proposed reference oscillator provides an efficient embedded solution for SoC chips.

[1] B. Razavi, Design of Analog CMOS Integrated Circuits. McGraw-Hill, 2001.
[2] A. S. Sedra and K. C. Smith, Microelectronic Circuits, 4th Edition. Oxford University Press, 1998.
[3] N. H. E. Weste and D. Harris, CMOS VLSI Design, A Circuits and Systems Perspective, 3rd Edition. Pearson Education, 2005.
[4] K. Sundaresan, P. E. Allen, and F. Ayazi, “Process and temperature compensation in a 7-MHz CMOS clock oscillator,” IEEE J. Solid-State Circuits, vol. 41, no. 2, pp. 433-442, Feb. 2006.
[5] Y.-S. Shyu and J.-C. Wu, “A process and temperature compensated ring oscillator,” in Proc. Asia Pacific Conf. ASICs, Aug. 1999, pp. 283-286.
[6] N. R. Mahapatra, A. Tareen, and S. V. Garimella, “Comparison and analysis of delay elements,” in Proc. 45th Midwest Symp. Circuits and Syst., Aug. 2002, vol. 2, pp. II-473-II-476.
[7] M.-T. Tan, Joseph S. Chang, and Y.-C. Tong, “A process-independent threshold voltage inverter-comparator for pulse width modulation applications,” in Proc. 6th IEEE Int. Conf. Electro., Circuits and Syst., Sept. 1999, vol. 3, pp. 1201-1204.
[8] K. Sundaresan, K. C. Brouse, K. U-Yen, F. Ayazi, and P. E. Allen, “A 7-MHz process, temperature and supply compensated clock oscillator in 0.25m CMOS,” in Proc. Int. Symp. Circuits and Syst., May 2003, vol. 1, pp. I-693-I-696.
[9] A. Olmos, “A temperature compensated fully trimmable on-chip IC oscillator,” in Proc. 16th Symp. Int. Circuits and Syst. Design, Sept. 2003, pp. 181-186.
[10] A. V. Boas and A. Olmos, “A temperature compensated digitally trimmable on-chip IC oscillator with low voltage inhibit capability,” in Proc. Int. Symp. Circuits and Syst., May 2004, vol. 1, pp. I-501-I-504.
[11] W. S. T. Yan and H. C. Luong, “A 900-MHz CMOS low-phase-noise voltage-controlled ring oscillator,” IEEE Trans. Circuit Syst. II, Analog and Digital Signal Processing, vol. 48, pp. 216-221, Feb. 2001.
[12] Y. Li, Y.-F. Shi, L. Li, and Z.-Y Zheng, “CMOS bandgap voltage reference with 1.8-V power supply,” in Proc. Int. Symp. Circuits and Syst., Oct. 2003, vol. 1, pp. 611-614.
[13] G.-E. Ning and C. Chen, “A frequency stabilization circuit for the voltage controlled ring oscillator,” in Proc. Int. Symp. Circuits and Syst., Oct. 2007, pp. 333-336.
[14] J. G. Maneatis and M. A. Horowitz, “Precise delay generation using coupled oscillators,” IEEE J. Solid-State Circuits, vol. 28, no. 12, pp. 1273-1282, Dec. 1993.
[15] J. G. Maneatis, “Low-jitter process-independent DLL and PLL based on self-biased techniques,” IEEE J. Solid-State Circuits, vol. 31, no. 11, pp. 1723-1732, Nov. 1996.
[16] H. Chen, E. Lee, and R. Geiger, “A 2GHz VCO with process and temperature compensation,” in Proc. Int. Symp. Circuits and Syst., June 1999, vol. 2, pp. II-569-II-572.
[17] J. Routama, K. Koli, and K. Halonen, “A novel ring-oscillator with a very small process and temperature variation,” in Proc. Int. Symp. Circuits and Syst., June 1998, vol. 1, pp. I-181-I-184.
[18] G. D. Vita and G. Iannaccone, “An ultra-low-power, temperature compensated voltage reference generator,” in Proc. IEEE Cust. Int. Circuits Conf., Sept. 2005, pp. 751-754.