隨著人工智慧的迅速發展，「仿生電路」加速器被視為未來有潛力的運算架構。不同於馮紐曼架構，「記憶體內運算」將儲存單元與計算單元結合在類比非揮發性記憶體上，此法不僅可免除計算單元與記憶體單元資料搬移所造成的時間與能量消耗，還可以使矩陣乘法做大規模的平行化運算，最終達到高效率能量消耗及降低硬體面積。為了預測類比記憶體元件在新的人工智慧架構下，對最後的結果如準確率、功耗、運算速度會如何影響，因此本篇論文目標是建立類比非揮發記憶體仿生電路之深度學習模擬平台，並且探討元件的非理想特性如位元限制、非線性權重更新、元件對元件的變異對神經網路訓練之影響。
本論文以TensorFlow作為軟體框架，建立類神經網路模擬軟體，並以數學函式來描述類比記憶體元件波數量對權重之關係，透過修改函式的參數，可以調整元件的位元精準度和非線性程度。為了瞭解元件變異性對神經網路之影響，利用高斯分佈函數建立變異性分佈矩陣，藉此模擬元件對元件的變異性。為了計算晶片在神經網路訓練過程的能耗，建立動態能耗與靜態能耗之公式，探討不同運算階段之能耗。最後萃取真實元件電阻式記憶體之參數以比較不同元件在神經網路之準確率。
利用上述基礎所建立之模擬平台，可從模擬結果可知，元件至少需要八位元才能達到90%以上的準確率，而當元件曲線越非線性時準確率下降越嚴重。透過額外的數位電路幫助累積權重梯度，可使元件在低精準度的神經網路仍可以達到95%以上的準確率，也大幅提升非線性特性的準確率。結果比較了不同的真實電阻式記憶體元件在神經網路的準確率。在元件對元件的變異性模擬中，可發現神經網路對元件的變異性有強健度。

With the rapid development of artificial intelligence, the "Neuromorphic" accelerator is regarded as a potential computing architecture in the future. Unlike the Von Neumann architecture, "In-memory computing" combines storage units and computing units on analog non-volatile memory. This method not only eliminates the time and energy consumption caused by the movement of data between the computing unit and the memory unit, but also make matrix multiplication to do large-scale parallelization, and finally achieve high efficiency energy consumption and reduce hardware area. In order to predict how the analog memory components under the new artificial intelligence architecture will affect the results such as accuracy, power consumption and operation speed, the goal of this paper is to establish a deep learning simulation platform for analogous non-volatile memory neuromorphic circuits. And explore the non-ideal characteristics of device such as bit constraints, nonlinear weight updates, component-to-component variations on neural network training.
In this thesis, TensorFlow is used as the software framework to build a neural network simulation software. The mathematical function is used to describe the relationship between the number of analog device pulse and the weight. By modifying the parameters of the function, the bit precision of the device and degree of nonlinearity can be adjusted. In order to understand the influence of component variability on the neural network, a Gaussian distribution function is used to establish a variability distribution matrix, thereby simulating the device-to-device variation. In order to calculate the energy consumption of the synaptic array during the neural network training process, the formulas of dynamic energy consumption and static energy consumption are established, and the energy consumption in different operation stages is discussed. Finally, the parameters of the real device resistive memory (RRAM) are extracted to compare the accuracy of different device in the neural network.
Using the simulation platform established by the above foundation, the simulation results show that the deivce needs at least 8-bit to achieve an accuracy of more than 90%. When the device curve more nonlinear, the accuracy decay more severe. By accumulating the weight gradient through additional digital circuits, the accuracy can achieve more than 95% in a low-precision neural network, and also greatly improve the accuracy of nonlinear characteristics. The results compare the accuracy of different real RRAM device in the neural network. In the variability simulation of component-to-component, it can be found that the neural network is robust to the variability of the device.

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