本論文為針對低靜態電流低失真之類比輸入D類音頻放大器與高動態範圍且增加低失真輸出功率之數位輸入D類音頻放大器設計之研究。

在類比輸入D類音頻放大器設計中，為了延長電池使用時間並降低非線性失真，本論文分析傳統D類音頻放大器的靜態電流與非線性失真來源，以及一個前饋式脈寬調變殘值混疊抑制技術對於抑制失真的限制。此外，本論文提出一個零相位偏移技術來消除前饋式脈寬調變殘值混疊抑制技術的相位偏移延遲效應，藉此進一步地改善總諧波失真加雜訊達10dB。此技術使D類音頻放大器與現存最佳文獻相比，僅需消耗最低的靜態電流0.41mA，且FOM達2342.5亦為現存文獻最高。

在數位輸入D類音頻放大器設計中，高階三角積分調變器的穩定度問題限制了開迴路D類放大器的最大低失真輸出功率。本論文分別設計適應性係數三角積分調變器以及串聯式三角積分調變器，使調變器同時具有高解析的雜訊抑制能力以及全域穩定輸入範圍。與傳統調變器設計相比，將串聯式三角積分調變器應用在一個既定直流電源下，可以增加開迴路數位輸入D類音頻放大器的低失真輸出功率達40%。除了D類音頻放大器本身的設計外，本論文實現一個內建降壓/升壓型直流直流轉換器之數位輸入D類音頻放大器。此降壓/升壓型轉換器配合所提出的音量控制技術，除了將有限的電池電壓升高來提供音頻放大器輸出更大的功率外，亦可在音量調小時降低D類放大器之電源電壓，藉此抑制數位時脈抖動在小輸出功率時對放大器音質的影響。此外，藉由一個動態數位濾波器實現的等效移動平均亦進一步提升此音頻放大器的動態範圍，並減少頻帶外雜訊在揚聲器的功耗。

This dissertation focuses on the low-quiescent-current low-distortion analog-input Class-D audio amplifier and high-dynamic-range increased-low-distortion-output-power digital-input Class-D audio amplifier designs.

To design an analog-input Class-D audio amplifier for battery life extension and nonlinear distortion suppression, this dissertation analyzes the quiescent current and the distortion sources of Class-D audio amplifiers, and examines a feed-forward Pulse-width modulation (PWM)-Residual-Aliasing Reduction (PRAR) technique to discover the inherent limitation of the distortion suppression. Moreover, a Zero-Phase-Shift PRAR (ZPS-PRAR) is proposed to eliminate the phase-shift delay effect, resulting in a Class-D amplifier with the minimum THD+N improvement by 10dB compared with the PRAR technique. Compared with other state of the arts, the ZPS-PRAR Class-D amplifier achieves the lowest quiescent current of 0.41mA and the highest FOM of 2342.5.

In the digital-input Class-D audio amplifier design, the low-distortion output power is limited by the stability problem of the high-order delta-sigma modulator in the open-loop architecture. In this dissertation, an adaptive-coefficient delta-sigma modulator (ACDSM) and a series-connected delta-sigma modulator (SCDSM) are realized to simultaneously achieve a high in-band noise suppression and a full-scale stable input range. Compared with conventional delta-sigma modulator designs, the realized SCDSM increase the low-distortion output power of the Class-D amplifier by 40%. In addition, this dissertation realizes an embedded buck/boost DC-DC converter to meet the increasing output power demand of the modern audio amplifier applications. A supply-voltage-scaling volume control is proposed to determine the buck/boost converter not only to boost the supply voltage to deliver more output power for Class-D amplifiers, but also to lower the supply voltage according to the digital volume levels for jitter effect reduction at small volume levels. The equivalent moving average filtering is also realized with the supply-voltage-scaling volume control to further improve the dynamic range and reduce the speaker power loss caused by the out-of-band noise.

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