本論文針對室內及室外光能獵能晶片設計研究。
針對室外光能獵能晶片設計且獵能範圍在幾十毫瓦至各位數瓦的應用。本論文透過低複雜度最大功率追蹤演算法「最適合等效負載線(Adaptive Load-line, ALL)」使得結合光伏模組的移動式產品能快速並精準地追蹤並輸出最大功率。ALL 藉由併用擾動觀察法(perturb-and-observe, P&O) 及負載線斜率校正( load-line slope calibration, LSC)兩種技術達到高追縱效率及縮短暫態時間。本論文透過分析比較，發現在週期性光照快速變動下，ALL的追蹤效率遠優於傳統P&O。此晶片使用TSMC 0.5 μm 2P4M 5 V Mixed Signal CMOS製程，晶片大小約為3 mm2。實際量測結果顯示暫態響應為1.6 msec，追蹤效率高達99.9 %，功率轉換效率達94 %，功率密度則為168mW/mm2，兼具功率及體積最佳化設計，適用於移動式裝置。此外，結合ALL晶片及一些外部元件可組成一200 W的光能獵能系統，可同時達到高功率轉換效率(> 95 %)及高追縱效率(99.9 %)。
針對室內光能獵能晶片設計且獵能範圍在幾微瓦至百微瓦的應用。本論文透過一具能量回收技術的光能獵能系統管理光伏模組、電池與負載間的功率。此能量回收技術傳送獵取之光能至負載，再回收多餘能量至電池，如此在單電感雙輸入雙輸出的轉換器中可省去一電感分享之功率電晶體，因此本論文使用一透過恆定導通時間脈衝跳躍方式調變且操作於不連續導通模式之三開關雙路徑(2P3S)轉換器穩壓負載。在動態光伏模組及負載功率變動下，相較於現有文獻，此2P3S轉換器擁有較高的轉換效率並透過最佳化功率電晶體及恆定導通時間最大化整體效率。此晶片使用TSMC 0.5 μm 2P4M 5 V Mixed Signal CMOS製程，有效晶片面積為0.5 mm2，實際量測的控制器功耗為0.85 μA，在40 μW光伏模組輸出且負載功率範圍0 μW至20 mW下，擁有80.7 %至95.0 %轉換效率。與現有文獻比較，2P3S轉換器靜態光伏模組及負載功率變動下具有最高轉換效率，動態光伏模組及負載功率變動下則是在較高光伏模組輸出功率時有較高的轉換效率。

This dissertation focuses on indoor and outdoor light energy harvesting IC design.
To harvest outdoor light energy from tens of milliwatts to several watts, this dissertation uses a maximum power point tracking (MPPT) algorithm, adaptive load-line (ALL), that enables fast and accurate impedance matching with photovoltaic (PV) modules integrated within mobile devices. The proposed ALL incorporates perturb-and-observe (P&O) and load-line slope calibration (LSC) to achieve high MPPT efficiency and short transient time. This dissertation compares the loop response of the ALL and conventional P&O, and analyzes the power loss of MPP variation during the transient time under periodically changing irradiance. The MPPT efficiency can be obtained by estimating the power loss under different irradiance-changing periods, and the ALL has superior performance than conventional P&O. The energy harvesting circuit with the ALL is implemented in TSMC 0.5 μm 5 V CMOS process with a die area of 3 mm2. The measurement result shows that a transient time of 1.6 ms is achieved while simultaneously maintaining 99.9 % steady-state accuracy, even under fast-changing shading conditions; additionally, 94 % peak power conversion efficiency and 168 mW/mm2 power density are realized to fulfill the power- and volume-efficient requirements of mobile devices. Moreover, combining the ALL IC with a few discrete components can constitute a 200 W light energy harvesting system that simultaneously achieves high conversion efficiency (> 95 %) and maintains high steady-state accuracy (99.9 %).
To harvest indoor light energy from tens to hundreds of microwatts, this dissertation proposes an energy-recycling (ER) technique for power management among a PV module, battery, and load in light energy harvesting systems. The ER technique delivers all harvested PV energy directly to the load with surplus energy recycled from the load to the battery, and eliminates inductor-sharing power switches in single-inductor dual-input dual-output (SIDIDO) converters. Accordingly, the proposed dual-path 3-switch (2P3S) converter, which operates in discontinuous-conduction mode and regulates load voltage by constant-on-time pulse-skipping modulation, was developed. By comparing efficiencies of state-of-the-art SIDIDO converters under dynamic PV- and load-power profiles (PP & PL), the 2P3S converter’s advantageous applications are identified. The overall efficiency under static PP & PL and indirect-path efficiency under dynamic PP & PL are maximized by optimizing the switch sizes and on-time. The chip has three power switches and a controller employing low-power circuits, and is fabricated in 0.5 μm CMOS process with a 0.5 mm2 active area. The measured controller current is 0.85 μA. Under static PP & PL, and for a PP of 40 μW, the efficiency ranges from 80.7 % to 95.0 % for 0 μW to 20 mW load power. Compared with other state-of-the-arts, the 2P3S converter has the highest efficiency under static PP & PL and higher efficiency with more PV energy directly consumed by the load under dynamic PP & PL.

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