NAND 型快閃記憶體有非揮發、體積小、消耗能量低、耐撞擊等等特性，使其成為設計嵌入式系統、手持式行動裝置時，作為主要儲存裝置的首選。但NAND 型快閃記憶體有讀取快，寫入慢，且有非本地更新的限制，故在使用NAND 型快閃記憶體時，設計者常使用快閃記憶體轉換層(Flash Translation Layer, FTL) 將這些特性隱藏，使NAND 型快閃記憶體能如同一般的區塊裝置使用。FTL 同時負責管理抹除位址，以平均每個區塊的抹除次數，此乃因NAND 型快閃記憶體每個區塊的抹除次數有限。
在傳統針對磁碟機設計的分頁子系統上使用NAND 型快閃記憶體作為分頁機制儲存裝置時，直接使用FTL 時會產生多餘有效頁搬移的情形。本論文修改核心，使用無效化機制來減少多餘的有效頁搬移情形。並使用Swap FTL來管理底層的NAND型快閃記憶體，有效平均各區塊的抹除次數，延長NAND 型快閃記憶體壽命。
本論文並在Linux 上實作提出的機制，在MTD (Memory Technology Devices) 子系統內實作Swap FTL 來管理底層的NAND 型快閃記憶體分頁機制儲存裝置。效能評估部份，則先追蹤Linux 作業系統內分頁置換的位址，再將位址存取資訊輸入給MTD 子系統進行模擬分析。模擬結果顯示使用本論文提出的機制能有效地降低
NAND 型快閃記憶體的讀取、寫入、抹除、以及有效頁搬移次數；NAND 型快閃記憶體各區塊的抹除次數也較平均，其使用壽命因而能增長。

NAND flash memory comes with features such as non-volatile, small physical size, low-power consumption, good shock-resistance etc. such that system designers tend to use NAND flash memory as the primary storage when designing mobile devices. However, the characteristics of out-of-place update, wear-leveling, and block-erasing make it very different from a hard disk. In an operating system with virtual memory, these characteristics become challenging issues when using NAND flash memory as paging device.
This thesis presents a study in using NAND flash memory as the paging device in virtual memory management. An investigation on FTL (Flash Translation Layer), which is a common approach to encapsulate the characteristics of NAND flash memory, and the interaction between virtual memory management subsystem and paging device is undertaken. We propose a Swap FTL to manage NAND-Flash-based paging device. In addition to the functions which are commonly supported by FTL such as logical-physical address mapping, in-place update emulation, erase address management, Swap FTL provides a feature to avoid unnecessary living-copies caused by the out-of-place-update characteristic of NAND Flash. To support this feature, the kernel needs merely to implement an invalidation mechanism.
To demonstrate the functionality of Swap FTL, a demo version is implemented in the MTD subsystem of Linux operating system. Its performance is evaluated by feeding a trace of paging addresses logged during some real-world operations. The results show that our approach works effectively and reduces the number of read, write, erase, and living-copies. Furthermore, the erase operations are evenly distributed to the blocks of NAND flash memory.

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