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研究生：	陳振鈞 Chen, Jenn-Jiun
論文名稱：	低電壓平方根領域濾波器之設計與實現 Design and Hardware Implementation of the Low Voltage Square Root Domain Filters
指導教授：	劉濱達 Liu, Bin-Da
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2003
畢業學年度：	91
語文別：	英文
論文頁數：	157
中文關鍵詞：	平方根領域、濾波器、低電壓、對數領域
外文關鍵詞：	low voltage, log domain, filter, SRD, square root domain
相關次數：	點閱：120 下載：2
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本論文提出一個根據金氧半場效電晶體平方根定律來實現的低電壓平方根領域濾波器，並藉由HSPICE模擬和硬體實現來驗證此設計方法的可靠度與可擴充性。此外，利用設計低電壓電路的技巧，在不影響濾波器效能的前提之下，我們成功的將電路的供應電壓降低到1.5伏特。所提出的濾波器架構具有低供應電壓、超過10 MHz的高極點頻率、寬廣的頻率可調範圍以及不錯的線性度與雜訊效能。
低電壓二階帶通濾波器電路以TSMC 0.25 μm 製程實現，經實驗證明電路之極點頻率可以藉由外加電流調整的特性，可調整範圍在4 MHz到10 MHz之間。在線性度方面：三階諧波失真為-44.76 dB, 而且在輸入信號峰對峰值100 mV時，總諧波失真也小於3%。

A low voltage square root domain filter based on the MOSFET square law is proposed in this thesis. Through the verification of HSPICE simulation and hardware implementation, the extendibility and the reliability of the design procedure are proved. Furthermore, the supply voltage is successfully level down to 1.5 V by the level shifter low voltage technique without degrading the performance of the filters. The proposed filter structure has the merits of low power supply voltage operation, high frequency operation, and the wide range of pole frequency tuneability with comparable linearity and noise performance.
The proposed circuit has been fabricated with 0.25 μm CMOS technology. The experimental results have verified the center frequency f0 of the band-pass filter can be electronically tunable in the range of 4 MHz to 10 MHz. The third order intermodulation (IM3) distortion is -44.67 dB and the total harmonic distortion (THD) is less than 3% for signal amplitude of 100 mV.

Chapter 1   INTRODUCTION	1
1 Background	1
2 Motivation	3
3 Thesis organization	5
Chapter 2   DESIGN METHODOLOGY OF SRD FILTERS	7
1 State-space approach	8
2 The transfer function to state-space equation transformation	9
2.1 First order filter transformation	9
2.2 Second order filter transformation	10
2.3 High order filter transformation	15
3 The design steps of the Square-root domain filter	15
3.1 The first low pass filter	17
3.2 The second order low pass filter	19
3.3 The second order band pass filter	21
3.4 The biquad filter	23
4   The design procedure of the square-root domain filter	26
Chapter 3   LOW VOLTAGE SQUARE-ROOT CIRCUIT	28
1 The stack MOS square-root circuit	28
2 The design of the low voltage square-root circuit	31
2.1 The low voltage technique selection	31
2.2 The level shifter current mirror selection and modification	32
3 Construction and simulation of the low voltage square-root circuit	38
Chapter 4   IMPLEMENTATION OF VARIOUS SRD FILTERS	46
1 Filter circuit structures modification	48
1.1 The first low pass filter	48
1.2 The second order low pass filter	50
1.3 The second order band pass filter	52
1.4 The biquad filter	55
2 The design and simulation of the first order low pass filter	57
2.1 Using load capacitor C=1 pF for high frequency range	57
2.2 Using load capacitor C= 10 pF for low frequency range	61
3 The design and simulation of the second order low pass filter	67
3.1 Using load capacitor C=1 pF for high frequency range	67
3.2 Using load capacitor C=10 pF for low frequency range	73
4 The design and simulation of the second order band pass filter	80
4.1 Using load capacitor C=1 pF for high frequency range	80
4.2 Using load capacitor C=10 pF for low frequency range	85
5 The design and simulation of the biquad filter	92
5.1 Low pass filter output using the load capacitor C=1 pF for high frequency range	92
5.2 Low pass filter output using the load capacitor C=10 pF for low frequency range	97
5.3 Band pass filter output using the load capacitor C=1 pF for high frequency range	104
5.4 Band pass filter output using the load capacitor C=10 pF for low frequency range	109
6 Cases discussion: Higher order filter design and simulation	116
6.1 Case discussion 1: second order band pass filter	117
6.2 Case discussion 2: third order low pass filter	118
6.3 Case discussion 3: eighth order low pass filter	120
6.4 Case discussion 4 : fifth order low pass filter	121
7 The Monte-Carlo analysis of the square root domain filter	122
8 Specification conclusion	123
Chapter 5   HARDWARE IMPLEMENTATION AND MEASUREMENT	124
1 The 1.5 V second order band pass filter	124
1.1 Hardware implementation	126
1.2 Simulation	129
1.3 Measurement	131
2 The 2.5 V second order band pass filter and biquad filter	134
2.1 Hardware implementation	136
2.2 Simulation	138
2.3 Measurement	143
Chapter 6   CONCLUSIONS	150
1 Conclusions	150
2 Future works	152
PUBLICATION LIST	154
REFERENCE	155
                                    

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校內：2004-07-08公開
校外：2004-07-08公開

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