| 研究生: |
周于哲 Chou, Yu-Che |
|---|---|
| 論文名稱: |
2.4 GHz低相位失真封包消弭與重建和高輸出功率24 GHz功率放大器之研製 Study of 2.4 GHz Low Phase Distortion Envelope Elimination and Restoration and High Output Power 24 GHz Power Amplifiers |
| 指導教授: |
楊慶隆
Yang, Chin-Lung |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2013 |
| 畢業學年度: | 101 |
| 語文別: | 中文 |
| 論文頁數: | 87 |
| 中文關鍵詞: | CMOS 、功率放大器 、功率結合 、容值補償 |
| 外文關鍵詞: | CMOS, power amplifier, power combining, capacitance compensation |
| 相關次數: | 點閱:93 下載:4 |
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本論文利用TSMC 0.18-μm 1P6M CMOS 製程設計功率放大器,在設計上分成兩部份:第一部份為一應用於封包消弭極座標發射器的功率放大器,設計出一極低相位失真的E類功率放大器;第二部份器則是以高輸出功率的高頻系統應用為目標,以變壓器作為功率結合器,以提高CMOS製程下受限的輸出功率。
第一顆功率放大器,頻率選為與藍芽同樣頻帶的2.4 GHz。為了改善用於此封包消弭發射器系統中的功率放大器往往都有輸出相位隨供應電壓產生變異的情況,使用了兩顆變容器以彌補電晶體寄生電容隨著偏壓的改變。此技術同時解決了寄生電容變異帶來的其他問題,包含較低的汲極電壓使電晶體較不易崩潰,以及固定電壓供應源視入的阻抗。其電路特性量測如下:輸出相位變動範圍可達極低的3.1 degrees;輸出功率為18.03 dBm、最高功率增加效率為40.04 %。
第二顆功率放大器,頻帶選為一般車用雷達所用的24 GHz。放大器選用AB類偏壓疊接架構的功率放大器。為了提高輸出功率,使用變壓器形式的功率結合器將兩顆功率放大器的輸出功率結合。功率結合器採用新型的”Figure 8”架構,可同時將輸出功率結合、轉換至單端訊號,與阻抗轉換和供給偏壓。其電路特性模擬如下:輸出飽和功率高達22.83 dBm,相較目前同頻帶的許多文獻都來得高,最高功率增加效率可達11.96 %、增益為16.37 dB。
This thesis composed of two parts. One is a power amplifier with low phase modulation variation for an Envelope Elimination and Restoration transmitter. The other is a power amplifier with high output power for a k-band high-power system. With a power-combining transformer, the limited output power of a power amplifier in CMOS process can be increased.
The frequency of the first power amplifier is 2.4 GHz, which is the same with the frequency of Bluetooth systems. In order to fix the phase modulation variation problem in the most power amplifiers in EER systems, two varactors are adapted to compensate the variation of the parasitic capacitor. The parameters are measured as below: The maximum output power is 18.03 dBm. The peak power-added efficiency is 40.04 %. The variation of output phase is 3.1 degrees.
The frequency of the second power amplifier is 24 GHz, which is the operating frequency of automotive radar system. The structure of the class-AB power amplifier is cascode and differential. In order to increase the output power, the output power of two power amplifier is combined with a transformer-based power combiner. The combiner structure is novel “Figure 8” structure, which is capable of combining the power, converting a differential signal to a single-ended signal, transforming the load impedance, and supplying the drain bias. The parameters are simulated as below: The saturated output power is 22.83 dBm, which is higher than the most published works. The peak power-added efficiency is 11.96 %. The gain is 16.37 dB.
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