簡易檢索 / 詳目顯示

研究生: 蘇俊銘
Su, Jun-Ming
論文名稱: H.264適應性可變長度解碼器之設計
Design of CAVLC Decoder for H.264/AVC Video Coding
指導教授: 賴源泰
Lai, Yen-Tai
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2013
畢業學年度: 101
語文別: 英文
論文頁數: 61
中文關鍵詞: H.264/AVC熵編碼內容適應性可變長度編碼
外文關鍵詞: H.264/AVC, Entropy coding, CAVLC
相關次數: 點閱:122下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 近年來,許多影像壓縮編碼標準相繼被提出,而H.264/AVC是最熱門的影像壓縮編碼標準。為了要擁有更高的壓縮效率,H.264/AVC的熵編碼(Entropy Coding)部分採用內容適應性可變長度編碼(context-based adaptive variable length coding, CAVLC) ,適應性可變長度編碼是一種無失真的壓縮方式,用來移除統計上的冗餘位元提高編碼效率。
    適應性可變長度編碼在進行解碼的過程中,需要大量的記憶體存取,進行的查表動作,這會增加功率消耗也會需要較高的硬體成本。
    本篇論文主要研究CAVLC解碼器部分,研究如何減少硬體成本以及降低功率消耗的方法。我們分析CAVLC相關的字碼表建立其規則,在Coeff_token及Run_before兩個部分,使用一個計數器找出第一個不為零係數前面零的個數結合整數算術解碼方式取代傳統的查表法。在Total_zeros部分,我們將碼表分組後再改良傳統的查表法。最後根據實驗結果,我們所設計的電路與傳統的架構相比,平均功率消耗大約可以降低32%到38%,在合成結果中顯示,電路只需要6.78K個邏輯閘。

    Several video compression coding standards have been proposed in recent years. H.264/AVC is one of the most popular formats for video compression coding. To enhance compression efficiency, context-based adaptive variable length coding (CAVLC) is used in the entropy coding of H.264/AVC. The CAVLC approach is adopted for lossless compression method, and is used to remove statistical redundancy and improve coding efficiency.
    A large amount of memory accesses are required for the CAVLC decoding process. This increases power consumption and necessitates the use of costly hardware.
    This paper mainly studies the CAVLC decoder. We investigated methods of reducing the hardware costs and power consumption. We analyzed CAVLC codeword table to establish the rules of the CAVLC decoding process, and adopted a zero counter to calculate the total number of zeros preceding the first non-zero coefficient. This method was combined with an integer arithmetic operation, which replaced the traditional table lookup method in two parts: Coeff_token and Run_before. We classify a codeword table to improve the traditional table lookup method in the Total_zeros part.
    According to our simulation, the proposed design saves 32% to 38% in power consumption, compared with the original design. The synthesis result shows that the gate count was 6.78K.

    Chapter 1 Introduction 1 1.1 H.264/AVC Video Compression Standard 1 1.2 Motivation 3 1.3 Thesis Organization 4 Chapter 2 Review of H.264/AVC 5 2.1 Overview of H.264/AVC 5 2.2 Intra prediction 6 2.3 Inter prediction 8 2.3.1 MOTION COMPENSATION 9 2.3.2 QUARTER SAMPLE ACCURATE MOTION VECTOR [4] 10 2.4 Integer Transform and Quantization 12 2.5 Entropy Coding 12 Chapter 3 CAVLC in H.264/AVC 14 3.1 Context-based Adaptive Variable Length Coding 14 3.1.1 ENCODE THE COEFF_TOKEN 16 3.1.2 ENCODE THE SIGN OF EACH TRAILINGONE 20 3.1.3 ENCODE THE LEVEL[7] 20 3.1.4 ENCODE THE TOTAL_ZEROS 21 3.1.5 ENCODE THE RUN_BEFORE 23 3.2 CAVLC examlpe 24 Chapter 4 Proposed Design of CAVLC Decoder 26 4.1 Related Works 26 4.2 Overview of Proposed Architecture 28 4.2.1 LENGTH GENERATOR 29 4.2.2 CONTROLLER 30 4.2.3 INPUT STREAM BUFFER 30 4.2.4 COEFF_TOKEN DECODER 31 4.2.5 TRAILINGONES DECODER 36 4.2.6 LEVELDECODER 37 4.2.7 TOTAL_ZEROS DECODER 39 4.2.8 RUN_BEFORE DECODER 40 Chapter 5 Experimental Results 44 5.1 Synthesis Results 44 5.1.1 AREA REPORT 45 5.2 Comparisons 46 Chapter 6 Conclusions 50 REFERENCES 51 Appendix A 54

    [1] T. Wiegand, G. Sullivan and Ajay Luthra, “Draft ITU-T recommendation and final draft international standard of joint video specification (ITU-T Rec. H.264 |ISO/IEC 14496-10 AVC),” Joint Video Team (JVT) of ISO/IEC MPEG and ITU-T VCEG, JVT G050r1, Geneva, Switzerland, May 2003.
    [2] A. John, F. Kossentini, H. Schwarz, T. Wiegand and G. J. Sullivan, “Performance Comparison of Video Coding Standards using Lagrangian Coder Control,” Proceedings of International Conference on Image Processing, vol. 2, pp. 501-504, September 2002.
    [3] Minhua Zhou, “Evaluation and Simplification of H.26L Baseline Coding Tools ” ITU-T Q.6/16, Doc.#JVT-B030, 2002
    [4] Iain E. G. Richardson, ”H.264 and MPEG-4 Video Compression,” Baker & Taylor Books, pp. 159-222, Dec. 2003
    [5] Q. Xe, J. Liu, S. Wang, and J. Zhao, “H.264/AVC baseline profile decoder optimization on independent platform,” International Conference on Wireless Communications, Networking and Mobile Computing, vol. 2, pp. 1253 – 1256, Sep. 2005.
    [6] J.Y. Lee, J.J. Lee, and S.M. Park, “New Lookup Tables and Searching Algorithms for Fast H.264/AVC CAVLD Decoding,” IEEE Trans. on Circuits and Systems for Video Technology, vol. 20, pp.1007-1017, July 2010.
    [7] ITU-T Rec.H.264/ISO/IEC 14496-10, “Advanced Video Coding“, March 2005.
    [8] H. C. Chang, C. C. Lin, and J. I. Guo, “ A Novel Low-cost High-performance VLSI Architecture for MPEG-4 AVC/H.264 CAVLC Decoding,” in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), pp. 6110-6113, 2005.
    [9] M. Liu, X. Zeng, H. Ni, “Codeword Classification Mapping Based CALVC Decoding Implement Algorithm,” Information Science and Engineering (ICISE),2009 1st International Conference on, pp. 433-436, 2009.
    [10] Y. Chen, et al., “A Memory-Efficient CAVLC Decoding Scheme for H.264/AVC,” in Proc. of International Conference on Advanced Communication Technology, pp. 1135-1138, Feb 2008.
    [11] Y. H. Moon, G. Y. Kim, and J. H. Kim, “An Efficient Decoding of CAVLC in H.264/AVC Video Coding Standard,” IEEE Trans. Consumer Electron, Vol. 51, no. 3, pp. 933–938, Aug. 2005.
    [12] Y. Chen, X. Cao, X. Peng, C. Peng, D. Yu, X. Zhang, “A Memory-Efficient CAVLC Decoding Scheme for H.264/AVC” 10th International Conference Advanced Communication Technology, Vol. 2, pp. 1135– 1138, Feb. 2008.
    [13] T. H. Tsai and D. L. Fang, “A Novel Design of CAVLC Decoder with Low Power Consideration, ” IEEE Asian Conf. Solid-State Circuits, pp. 196–199, Nov, 2007.
    [14] H. Y. Lin, Y. H. Lu, B. D. Liu, J. F. Yang, “A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder, ” IEEE Transaction on Multimedia, Vol. 10, No. 1, Jan, 2008.
    [15] T. H. Tsai, D. L. Fang, and Y. N. Pan, “A novel design of CAVLC decoder with low power and high throughput considerations,” IEEE Trans. Circuits Syst. Video Technol., vol. 31, no. 3, pp. 311–319, Mar. 2011.
    [16] Y. N. Wen, G. L. Wu, S. J. Chen, and Y. H. Hu, “Multiple-symbol parallel CAVLC decoder for H.264/AVC,” in Proc. IEEE APCCAS, Dec, 2006, pp. 1240-1243.
    [17] G. S. Yu and T. S. Chang, “A zero-skipping multi-symbol CAVLC decoder for MPEG-4 AVC/H.264,” in Proc. IEEE ISCAS, May 2006, pp. 5583-5586.
    [18] M. Allen, J. Biswas, and S. K. Nandy, ” High performance VLSI architecture design for H.264 CAVLC decoder,” in Proc. IEEE 17th Int. Conf. Application-Specific Systems, Architectures Processors, Steamboat Springs, CO, Sep. 2006, pp. 317-322.
    [19] B. Y. Lee and K. K. Ryoo, “A design of high-performance pipelined architecture for H.264/AVC CAVLC decoder and low-power implementation,” IEEE Trans. on Consum. Electron., vol. 56, no. 4, pp. 2781-2789, 2010.
    [20] H. Y. Lin, Y. H. Lu, B. D. Liu, J. F. Yang, “Low power design of H.264 CAVLC decoder,” Proc. IEEE ISCAS, pp.2689-2692, May 2006.

    無法下載圖示 校內:2023-07-01公開
    校外:不公開
    電子論文尚未授權公開,紙本請查館藏目錄
    QR CODE