在本篇碩論中，將提出一個兼具1%輸出電壓抖動分析之偵測器及1個次臨界操作兼斜率匹配暨可外調抗PVT之補償電流源與負載暫態響應為，並混合於一個定頻準V2 控制之混合式降壓轉換器。在1%輸出電壓抖動分析之偵測器中，電容電流偵測器將快速偵測負載電流變化資訊，並藉由設計之偵測器判決對應需要的補償電流，經過混合補償電流至降壓轉換器達到在較短的穩定時間和最小的輸出電壓暫態抖動。與目前最先進的參考文獻比起來，本篇碩論達到最短穩定時間30ns且輸出電壓抖動僅有36mV(2% 輸出電壓誤差在有考慮電容上寄生電桿的情況下).提出的補償電流兼併以下功能:一個能達到快速負載暫態響應快速啟動且良好設計的補償電荷及一個能達到抵抗PVT飄移的調整機制。
所提技術被實現在台積電0.18um製程，整體晶片面積為2mm2。穩定時間，模擬結果顯示可輸出電壓抖動與穩定時間從100毫伏與800奈秒改善到36毫伏與30奈秒在輸出負載電流變化為每奈秒250毫安培與輸出電容為1微法拉的情況下。

In this thesis, an 1% transient analyzed detector (TAD) and a subthreshold operating, slope-fitting and headroom-equipped (SSH) compensated current source (CS) are achieved and implemented on a constant frequency quasi-V2 control hybrid buck DC-DC converter. In TAD, a capacitor current sensor (CCS) immediately senses load transient and the designed detector judges the right compensated current from CS to output for short settling time and small undershoot/overshoot in the output voltage (Vo). Compared with the state of the art, the settling time is the shortest and only 30ns, and undershoot/overshoot is only 36mV (2% of nominal Vo considering the effects of equivalent series inductance). The SSH compensated CS, includes a fast-enabled and well-designed charge compensation for load transient response and an adjustable headroom for anti-PVT variations. Also, the analysis method of load transient for hybrid converter is achieved for maximizing the reduction of settling time and undershoot/overshoot.
The achieved technique is implemented in TSMC 0.18um CMOS process with a chip area of 2mm2. Simulation results show that the Vo undershoot/overshoot and settling time are decreased from 100mv and 800ns to 36mV and 30ns of a load-current step of 0.25A/1ns with a 1uF output capacitor.

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