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研究生: 龔家和
Kung, Chia-Ho
論文名稱: 具有放大器共享與雜訊耦合技術的高通三角積分調變器
High-Pass Sigma–Delta Modulator with Operational Amplifier Sharing and Noise-Coupling Techniques
指導教授: 李順裕
Lee, Shuenn-Yuh
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2022
畢業學年度: 110
語文別: 中文
論文頁數: 70
中文關鍵詞: 放大器共享技術雜訊耦合技術新型高通積分器
外文關鍵詞: high-pass sigma–delta modulator, noise-coupling technique, operational amplifier sharing, high-pass integrator
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  • 本論文提出了一個應用在生理訊號擷取系統中的高通三角積分調變器電路,此電路使用了放大器共享與雜訊耦合的技術來達到低功率消耗與高精確度的表現。藉由放大器共享技術能使兩級積分器在時脈錯開的情況下結合,並共用一個放大器,故能大幅降低功率消耗,且能保持原有雜訊整形的階數。雜訊耦合技術則是能在不使用額外積分器的情況下,透過在原本就有的加法器上運作,可讓整體的雜訊整形階數再提升一階,使電路能有更高的精確度表現。除此之外,由於傳統高通積分器架構的電路實現方法會讓電容不匹配對電路表現有嚴重的影響,使電路更加敏感於製程變異,因此本篇論文提出了新型的高通積分器架構,除了能克服上述的問題,同時也能帶來其他好處,像是能讓高通積分器內部具有更低功率消耗的放大器,使量測結果展現不錯的技術指標。
    晶片的實現使用了TSMC 0.18μm 1P6M的製程,而從量測的結果可以得知,在精確度的表現上,SNDR為75.26 dB,功率消耗的部分為1.524μW,證明此電路因為使用了上述的技術與提出新架構確實達到高精確度與低功率消耗的表現,使此電路在近幾年低速的三角積分調變器中具有非常大的優勢。
    關鍵字:放大器共享技術、雜訊耦合技術、新型高通積分器

    A 3rd-order feedforward High-Pass Sigma-Delta Modulator (HPSDM) with operational amplifier (op-amp) sharing and noise-coupling techniques is presented in this paper. The modulator is suitable for biomedical signal acquisition with features of high resolution and low power consumption. Op-amp sharing technique has been utilized to reduce the number of amplifiers. To add an additional noise-shaping order, the noise-coupling technique is embedded in the summing stage without additional amplifier. To overcome the circuit sensitivity to process variation and capacitor mismatch, a new high-pass integrator structure is proposed. Simulation results reveal a Signal-to-Noise and Distortion Ratio (SNDR) of 79.64 dB consuming 1.31 μW under 1.2 V supply, which can achieve peak Schreier Figure-of-Merit (FoM) of 161.64 dB and peak Walden FoM of 0.4 pJ/conv.
    Keywords: high-pass sigma–delta modulator, noise-coupling technique, operational amplifier sharing, high-pass integrator

    章節目錄 摘要 II 誌謝 XII 章節目錄 XIII 表目錄 XV 圖目錄 XVI 第一章 緒論 1 1.1 研究背景 1 1.2 研究動機與目的 3 1.3 章節架構 5 第二章 具有放大器共享於雜訊耦合技術的高通三角積分調變器設計 6 2.1 架構概述 6 2.2 建立系統架構的理想模型 9 2.2.1 各階雜訊整型模型分析 9 2.2.2 高通三角積分調變器轉換 11 2.2.3 模型建立與設計 12 2.3 高通三角積分調變器的非理想效應 14 2.3.1 非理想模型的建立 14 2.3.2 積分器與加法器的非理想模型 15 2.4 使用放大器共享技術的前版本高通三角積分調變器 18 2.4.1 放大器共享技術 19 2.4.2 高通積分器 22 2.4.3 前版高通積分器與放大器共享技術的結合 24 2.5 新型高通積分器的架構 28 2.5.1 傳統與前版高通積分器的問題 28 2.5.2 翻轉電容式高通積分器架構 30 2.5.3 交換電容式高通積分器架構 33 2.6 應用在高通三角積分調變器之雜訊耦合技術 36 2.6.1 雜訊耦合 36 2.6.2 高通三角積分調變器結合雜訊耦合的技術 37 2.7 高通三角積分調變器的電路實現 39 2.7.1 開關電路 39 2.7.2 雜訊分析 41 2.7.3 放大器 43 2.7.4 加法器 48 2.7.5 量化器 49 2.7.6 時脈訊號產生器 49 2.7.7 高通三角積分調變器模擬結果 51 2.8 晶片佈局和佈局後模擬結果 53 第三章 晶片量測的考量與結果 56 3.1 晶片封裝與腳位 56 3.2 量測環境的設置與考量 57 3.3 晶片量測結果 59 3.4 文獻比較 63 第四章 結論與未來展望 64 參考文獻 65 口試委員建議與回覆 68

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