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研究生: 林偉誠
Lin, Wei-Cheng
論文名稱: 一個多階式快閃儲存上之讀取效能改善方法
A Method for Improving Read Performance on Multilevel-Cell NAND Flash Storage
指導教授: 張大緯
Chang, Dai-Wei
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊工程學系
Department of Computer Science and Information Engineering
論文出版年: 2016
畢業學年度: 104
語文別: 英文
論文頁數: 32
中文關鍵詞: 多階式NAND快閃記憶體固態硬碟資料擺放儲存管理
外文關鍵詞: MLC NAND, flash memory, solid-state drives, data placement, storage management
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  • NAND型快閃記憶體已經廣泛應用在電腦以及消費性電子裝置上。其中,多階式 (MLC) NAND型快閃記憶體允許兩個或多個以上的位元儲存在ㄧ個儲存單位中,提高了資料儲存密度,也因此降低了成本。低廉的價格讓多階式NAND型快閃記憶體在消費產品或是數據中心市場上受歡迎。在一個多階式NAND型快閃記憶體中,頁讀取延遲時間會因為頁的種類而有所差異。對於讀取密集的工作量來說,如果常讀取的資料放在讀取延遲長的頁將會造成效能降低。本篇論文中提出了FastRead,對於以多階式NAND型快閃記憶體為主的儲存空間,可以即時的增進讀取效能。FastRead動態辨識讀取的資料,並將其移動到讀取延遲較短的頁中,增進了讀取效能。根據實驗結果,對於三階式NAND型快閃記憶體,FastRead最多可以減少33%的讀取時間 (平均20%)。除此之外,FastRead並不會對寫入密集的工作量帶來明顯的負面影響,而且額外開銷也很小。

    NAND flash memory has been widely used in computer and consumer electronic devices. Multilevel-cell (MLC) NAND flash memory allows two or more bits to be stored per cell, improving the cell density and hence reducing the cost. The lower price of MLC NAND has made it appearing in both consumer product and datacenter markets. In MLC NAND, the page read latency varies according to the page type. For read-dominated workloads, placing read-intensive data into pages with longer read latencies may result in degraded read performance. In this thesis, an online method called FastRead is proposed to improve the read performance of MLC NAND based storage. The FastRead method dynamically identifies read-intensive data and migrates them to pages with shorter read latency to improve the read performance. According to the performance results, FastRead can reduce the read response time by up to 33% (20% on average) for read-dominated workloads on a TLC NAND. In addition, FastRead does not have noticeable performance impact for write-dominated workloads, and the overhead is insignificant.

    Chapter 1 Introduction...........................1 Chapter 2 Background and Related Work............5 2.1 Awareness of Fast and Slow Flash Pages.......5 2.2 Data Migration in a Solid-State Drive........6 Chapter 3 Design of FastRead.....................7 3.1 Page Access Monitor..........................8 3.2 Page Data Migrator..........................11 Chapter 4 Performance Evaluation................13 4.1 Experimental Setup..........................13 4.2 Experiment Results..........................15 4.2.1 Read Performance Improvement..............15 4.2.2 Overheads.................................18 4.2.3 Parameter Settings .......................22 Chapter 5 Conclusion............................29 References......................................30

    [1] S. Byan, J. Lentini, A. Madan, L. Pabón, M. Condict, J. Kimmel, S. Kleiman, C. Small, and M. Storer, “Mercury: Host-side flash caching for the data center,” in Proc. IEEE 28th Symp. Mass Storage Syst. Technol. (MSST), Apr. 2012, pp. 1-12.
    [2] T. Luo, S. Ma, R. Lee, X. Zhang, D. Liu, and L. Zhou, “S-CAVE: Effective SSD caching to improve virtual machine storage performance,” in Proc. 22nd Int. Conf. Parallel Architectures and Compilation Techniques (PACT), 2013, pp. 103-112.
    [3] S. Im and D. Shin, “Flash-aware RAID techniques for dependable and high-performance flash memory SSD,” IEEE Trans. Comput., vol. 60, no. 1, pp. 80-92, Jan. 2011.
    [4] M. Balakrishnan, A. Kadav, V. Prabhakaran, and D. Malkhi, “Differential RAID: Rethinking RAID for SSD reliability,” ACM Trans. Storage (TOS), vol. 6, no. 2, pp. 1-22, Jul. 2010.
    [5] J. Lee, S. Lee, O. Kwon, K. Lee, D. Byeon, I. Kim, K. Lee, Y. Lim, B. Choi, J. Lee, W. Shin, J. Choi, and K. Suh, “A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications,” J. Solid-State Circuits, pp. 1934-1942, Nov. 2003.
    [6] R. Micheloni, L. Crippa, and A. Marelli, Inside NAND Flash Memories. New York, NY, USA: Springer-Verlag, 2010.
    [7] M. Huang, Z. Liu, L. Qiao, Y. Wang, and Z. Shao, “An endurance-aware metadata allocation strategy for MLC NAND flash memory storage systems”, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. (TCAD), to be published.
    [8] L. M. Grupp, A. M. Caulfield, J. Coburn, S. Swanson, E. Yaakobi, P. H. Siegel, and J. K. Wolf, “Characterizing flash memory: Anomalies, observations, and applications,” in Proc. 42nd Annu. IEEE/ACM Int. Symp. Microarchitecture (MICRO), 2009, pp. 24-33.
    [9] L. M. Grupp, J. D. Davis, and S. Swanson. “The harey tortoise: Managing heterogeneous write performance in SSDs,” in Proc. USENIX Annu. Technical Conf. (ATC), 2013, pp. 79-90.
    [10] M. L. Chiang, P. C. H. Lee, and R. C. Chang, “Using data clustering to improve cleaning performance for flash memory,” Softw. Pract. Exp., vol. 29, no.3, pp. 267-290, Mar. 1999.
    [11] D. W. Chang, H. H. Chen, D. J. Yang, and H. P. Chang, “BLAS: Block-level adaptive striping for solid-state drives,” ACM Trans. Des. Autom. Electron. Syst. (TODAES), vol. 19, no. 2, pp. 21-49, Mar. 2014.
    [12] D. Liu, T. Wang, Y. Wang, Z. Qin, and Z. Shao, “PCM-FTL: A write- activity-aware NAND flash memory management scheme for PCM- based embedded systems,” in Proc. IEEE 32nd Real-Time Syst. Symp. (RTSS), 2011, pp. 357-366.
    [13] H. J. Kim and S. G. Lee, “An effective flash memory manager for reliable flash memory space management,” IEICE Trans. Inform. and Syst., vol. E85-D, no. 6, pp. 950-964, Jun. 2002.
    [14] M. L. Chiang and R. C. Chang, “Cleaning policies in mobile computers using flash memory,” J. Syst. and Softw., vol. 48, no. 3, pp. 213-231, Nov. 1999.
    [15] L. P. Chang and T. W. Kuo, “Efficient management for large-scale flash-memory storage systems with resource conservation,” ACM Trans. Storage, vol. 1, no. 4, pp. 381-418, Nov. 2005.
    [16] N. Agrawal, V. Prabhakaran, T. Wobber, J. D. Davis, M. Manasse, and R. Panigrahy, “Design tradeoffs for SSD performance,” in Proc. USENIX Annu. Technical Conf. (ATC), 2008, pp. 57-70.
    [17] M. Murugan and D. Du, "Rejuvenator: A static wear leveling algorithm for NAND flash memory with minimized overhead," in Proc. IEEE 27th Symp. Mass Storage Syst. Technol. (MSST), May. 2011, pp. 1-12.
    [18] (2009). SSD extension for DiskSim simulation environment. [Online]. Available: http://research.microsoft.com/en-us/downloads/b41019e2- 1d2b-44d8-b512-ba35ab814cd4/
    [19] (2015). Storage Networking Industry Association. [Online]. Available: http://iotta.snia.org/
    [20] (2015). UMass Trace Repository. [Online]. Available: http://traces.cs.umass.edu/

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