本論文以TSMC 0.18um 1P6M CMOS製程，研究設計應用於TDOA無線定位系統發射機之RFIC射頻晶片，包含2.4-GHz 高速可程式除頻器、1-GHz 可程式金氏碼產生器、以及2-GHz 增益控制相移器，晶片採用打磅線至FR-4基板上進行量測。2.4-GHz高速可程式除頻器以兩組反相器鏈與傳輸閘組成，其除頻範圍從除2至除100總共分為17段，功率消耗為43.92 mW@1.8 V。1-GHz 可程式金氏碼產生器是以兩對五組D型正反器產生一週期為31之雜亂碼，功率消耗為36.12 mW@1.8 V。2.4-GHz 增益控制相移器利用調整0°/90°/180°/270°等四相位信號之強度，再予與合成產生0°~360°之相位移，功率消耗為31.24 mW@1.8 V

This thesis presents the design and implementation of RFICs for TDOA wireless positioning transmitter system. The RFICs are fabricated in TSMC standard 0.18um 1P6M CMOS process. The measurements are all performed on FR-4 test PCB with RFICs bounded. The developed RFICs include a 2.4-GHz high-speed programmable frequency divider, a 1-GHz programmable Gold code generator and a 2.4-GHz gain control phase shifter. The 2.4-GHz high-speed programmable frequency divider mainly consists of two rings of transmission gates and inverters. It is designed to have 17 selections from 2 to 100 and the power consumption is 43.92 mW @1.8V. The 1-GHz programmable Gold code generator is implemented by a pair of five D type flip-flops to generator a pseudo random noise code of length for each cycle, and the power consumption is 36.12 mW@1.8V. The 2.4-GHz gain control phase shifter can generator 0°~360° phase shift by combining some of four quadrature phase inputs and the
power consumption is 31.24 mW @1.8V.

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