隨著生醫感測元件微小化及可攜式需求，資料處理數位化已成為一種趨勢，高解析度與低功率之類比至數位轉換器是必須的。在本論文的第一部分，我們設計實現了一個2-1多級串疊三角積分調變器，以利往後加入生醫系統以完成整合晶片，此調變器使用台積電0.25um 1P5M CMOS電路技術來實現。量測結果在訊號頻寬為20kHz且超取樣64倍情況下，最大SNDR約為65dB，動態範圍約為70dB，在正常操作情況下功率消秏約為5mW。

　　此外，在本論文的第二部分，我們實現了二種型態CMOS溫度感測晶片，為了降低電路複雜度及增加感測器之準確度，我們使用串接之寄生雙載子電晶體來當量測溫度元件。另外，我們也設計了二種型態去比較因製程偏移造成準確度之不同。最後，此晶片同樣使用台積電0.25um 1P5M CMOS電路技術來實現，模擬結果在未校正前且溫度範圍為-55度~125度的狀況下，Type 1溫度誤差約為正負11度 ，Type 2溫度誤差約為正負3.5度 。而加上校正步驟後，Type 1溫度誤差約為正負2度 ，Type 2溫度誤差約為正負1.3度。

　　Regarding the requirements of the portable and tiny multi-biosensor system, to process the data into digital information is a trend. High-resolution and low power consumption A/D converter is necessary. The first section of this thesis is to design and implementation 2-1 cascade sigma-delta modulator for biochips system. The modulator was integrated in TSMC 0.25um CMOS technologies. The measured results can be achieved a peak SNDR of 65 dB and a dynamic range of 70 dB with signal bandwidth of 20kHz and oversampling ratio of 64. The power consumption is about 5mW under normal operation.

　　Besides, the second section of this thesis is to realize two types of CMOS temperature sensing chip. In order to reduce the complexity of the circuit and to increase the accuracy of the sensor, we use serial parasitic substrate bipolar transistor to measure the temperature. Besides, we design two types of temperature sensor to compare the differences of accuracy because of the variation of process. The whole chip was integrated in TSMC 0.25um CMOS technologies. Before calibration, the simulated results can be achieved the error is +-11 for the type 1 of the sensor and the error is +-3.5 for the type 2 of the sensor over the temperature range of -55~125 . After calibration, the simulated results can be achieved the error is +-2 for the type 1 of the sensor and the error is +-1.3 for the type 2 of the sensor.

[1] A. Bakker and J.H. Huijsing, “Micropower CMOS temperature sensor with digital output,” IEEE Trans. Solid-State Circuits, vol. 31, pp. 933-937, July, 1996.

[2] A. Bakker and J.H. Huijsing, “High-acccuracy CMOS smart temperature sensors,” Kluwer Academic Publishers, 2000.

[3] A. Boni, “Op-amps and startup circuits for CMOS bandgap references with near 1-V supply,” IEEE J. Solid-State Circuits, vol. 37, no.10 pp.1339-1343, Dec. 2002

[4] Analog Devices Inc., “AD7720 CMOS sigma-delta modulator, ” http://www.analog.com.

[5] B. Boser and B. Wooley, “The design of sigma-delta
modulation analog-to- digital converters,” IEEE J. of Solid-State Circuits, vol. SC-23, no. 6, pp. 1298-1308, December 1988.

[6] Behzad Razavi, ”Design of analog CMOS integrated circuit,” McGraw-Hill, New York, 2001.

[7] C. Renato T. de Mori, P. Cesar Crepaldi, T. Cleber Pimenta, “A 3-V 12-Bit second order sigma-delta modulator design in 0.8-um CMOS,” Grupo de Microeletronica-Escola federal de Engenharia de Itajuba pp. 124-129, 2001.

[8] D. A. Johns and K. Martin, “Analog integrated circuit design,” John Wiley & Sons, New York, 1997.

[9] G.C. Temes, “Finite amplifier gain and bandwidth effects in switch-capacitor filters,” IEEE J. of Solid-Circuits,vol.15,no.3, pp.358-361, June 1980.

[10] G. C. M. Meijer, A. J. M. Boomkamp, and R. J. Duguesnoy, "An accurate biomedical temperature transducer with on-chip microcomputer interfacing," IEEE J. Solid-State Circuits, vol. 23, pp.1405-1410, Dec. 1988

[11] G. Fischer, J.C. Daly, C. W. Recksiek, C.W. K.D. Friedland, Chun Yang, “Design of a programmable temperature monitoring device for tagging small fish,” Low power electronics and design, 1996, International Symposium on , 12-14 pp.319-322 Aug. 1996

[12] H. Banba, H. Shiga, etc. , “A CMOS bandgap reference circuit with sub-1-v operation,” IEEE J. Solid-State Circuits, vol.34, NO.5, pp.670-674, May 1999.

[13] I. Fujimori, L. Longo, and A. Hairapetian, “A 90-dB SNR 2.5-MHz output rate ADC using cascaded multibit delta-sigma modulation at 8x oversampling ratio,” IEEE J. of Solid-State Circuits, vol. 35, no. 12, pp. 1820-1828, December 2000.

[14] J. C. Candy and G. C. Temes, “Oversampling Delta-Sigma Converters,” IEEE PRESS, 1992

[15] K. E. Kujik, “A precision reference voltage source,” IEEE Journal of Solid-State Circuits, vol. SC-8, pp. 222-226, June 1973.

[16] K. Nagaraj, “SC circuits with reduced sensitivity to finite amplifier gain,” Proc. IEEE Int. Symp. Circuits and Syst., pp. 618-621, 1986.

[17] K. D. Chen, Tai-Haur Kuo, and Shuenn-Yuh Lee, “ High- order sigma-delta modulators synthsis tool (HOST),“ Dec. 1998.

[18] K. D. Chen, and T. H. Kuo, “An improved technique for reducing baseband tones in sigma-delta modulators employing data weighted averaging algorithm without adding dither,” IEEE Trans. on CAS II, vol. 46, no. 1, pp. 63-68, Jan. 1999.

[19] L. Williams and B. Wooley, “A third-order sigma-delta modulator with extended dynamic range,” IEEE J. Solid-State Circuits, vol. 29, no. 3, pp. 193-202, March 1994.

[20] M. Rebeschini, N.V. Bavel, P. Rakers, R. Greene, J. Caldwell, and J. Hang, “A 16-b 160-kHz CMOS A/D converter using sigma-delta modulation,” IEEE J. of Solid-State Circuits, vol. 25, no. 2, pp. 431-440, April 1990.

[21] National Semiconductor, “LM117/LM317A/LM317 3-terminal adjustable regular data sheet,” National Semiconductor, Inc., 1997. http://www.national.com.

[22] O. Nys and R. K. Henderson, “A 19-bit low-power multibit sigma-delta ADC based on data weighted averaging,” IEEE J. of Solid-State Circuits, vol. 32, no. 7, pp. 933-942, July 1997.

[23] P. Ferguson, A. Ganesan, and R. Adams, “One bit higher order sigma-delta A/D converters,” Proc. 1990 IEEE Int. Symp. Circuits Syst., pp. 890-893, May 1990.

[24] P. Aziz, H. Sorensen, and J. Spiegel, ”An overview of sigma-delta converters,” IEEE Signal Processing Magazine, pp. 61-84, January 1996.

[25] Russell Anderson, Texas Instruments, “讓Δ-Σ轉換器發揮
最大效能” http://www.ti.com.

[26] S. Rabii and B. A. Wooley, “A 1.8-V digital-audio sigma-delta modulator in 0.8mm CMOS,” IEEE J. Solid-State Circuits, vol. 32, no. 6, pp. 783-796, June 1997.

[27] S. R. Norsworthy, R. Schreier, and G. C. Temes, “Delta-sigma converters: theory, design and simulation,” IEEE Press, 1997.

[28] S. Brigati, F. Francesconi, P. Malcovati, and F. Maloberti, “A fourth-order single-bit switch-capacitor sigma-delta modulator for distributed sensor applications,” IEEE Instumentation and Measurement Technology Conference Anchorage, AK, USA, 21-23 pp. 253-256 May 2002.

[29] T. H. Kuo, and K. D. Chen, “A wideband CMOS sigma-delta modulator with incremental data weighted averaging,” IEEE J. Solid-State Circuits, vol. 37, no. 1, pp. 11-17, January 2002.

[30] T. H. Kuo, ”Advanced analog IC design,” EE, NCKU, 2002.

[31] Texas Instrumentation Inc., “ADS1201 high dynamic range delta-sigma modulator,” http://www.ti.com.

[32] TSMC, ”TSMC 0.25um Mixed Signal/RF 1P5M+ Salicide 2.5v/3.3v Process Design Kit,” 2004.

[33] V. Szekely, C. Marta, Z. Kohari, and M. Rencz, “CMOS sensors for on-line thermal monitoring of VLSI circuits”, IEEE Trans. VLSI Systems, Vol. 5, pp.270-276, Sep. 1997.

[34] Y. Matsuya, K. Uchimura, A. Iwata, T. Kobayashi, M. Ishikawa, and T. Yoshitome, “A 16-bit oversampling A-to-D conversion technology using triple- integration noise shaping,” IEEE J. of Solid-State Circuits, vol. SC-22, pp. 921-929, December 1987.

[35] Y. Greets, M. Marques, M. S. J. Steyaert and W. Sansen, “A 3.3-V, 15-bit delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications,” IEEE J. of Solid-State Circuits, vol. 34, no. 7, pp. 927-936, July
1999.

[36] Y. Geerts, M. S. J. Steyaert and W. Sansen, “A high-performance multibit DS CMOS ADC,” IEEE J. of Solid-State Circuits, vol. 35, no. 12, pp. 1829-1840, December 2000

[37] 何榮基，”On the design and test of switch-current sigma-delta modulator ” 國立雲林科大學電子與資訊工程研究所碩士論文, 民國九十年六月。

[38] 吳榮田，”Standard CMOS low operating voltage linear type bandgap reference voltage generator” 國立台灣大學電機工程學研究所碩士論文, 民國九十年。.

[39] 翁明鏟，”Design of CMOS temperature sensors” 國立交通大學電子工程學電子研究所碩士論文, 民國九十一年

[40] 薛子建，”The design implementation of low pass multibit delta-sigma modulator ” 國立台灣大學電機工程學研究所碩士論文, 民國九十年六月。

[41] 簡銘成，”Design of 8-bit thermal-to-digital converter in CMOS technology” 國立交通大學電子工程學電子研究所碩士論文, 民國九十年六月