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研究生: 梁東雄
Liang, Dong-Shong
論文名稱: 負微分電阻電路的研究與設計
Research and Design of NDR Circuits
指導教授: 甘廣宙
Gan, Kwang-Jow
戴政祺
Tai, Cheng-Chi
學位類別: 博士
Doctor
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2009
畢業學年度: 97
語文別: 英文
論文頁數: 93
中文關鍵詞: 負微分電阻除頻器混沌多值記憶器
外文關鍵詞: logic gate, chaos, negative differential resistance, frequency divider, multiple-valued memory
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  • 傳統上所謂的負微分電阻電路,指的是共振穿透二極體(RTD),它們主要是由Ⅲ-Ⅴ族複合半導體所構成,它們並不適合現在主流的CMOS或BiCMOS製程。然而在本論文所提出的新型負微分電阻電路有MOS-HBT-NDR,MOS-NDR 及R-HBT-NDR,這些負微分電阻電路除了擁有與RTD相同具有折疊的I-V特性曲線外,它們又具有高可調制的特點,尤其是它們符合現在的主流製程,它們能很容易的可以與其它的應用電路整合在一個晶片上,使系統在同一晶片上(SoC)成為可能。
    雙峰值的MOS-HBT-NDR 電路擁有較佳的峰-谷電流比(PVCR),及比RTD更寬的可調變的I-V特性曲線,我們在這個論文裡新研製了一個非常高的PVCR電路,並利用它以不同的負載方式來設計多值記憶器。我們又利用單穩態-雙穩態傳輸邏輯閘(MOBILE)理論,用新型的MOS-NDR電路來實作多功能邏輯閘,最後我們以新型的R-HBT-NDR電路來實作一個以NDR為基礎的混沌電路,並分別改變輸入頻率,輸入振幅及輸入偏壓來設計間夾有混沌效果的除頻器。

    Most of the previously published negative-differential-resistance circuits (NDR) are implemented by the resonant tunneling diode (RTD). These devices and circuits are Ⅲ-Ⅴ compound semiconductors, which are not compatible with the main stream of Si-based CMOS or SiGe-based BiCMOS process.
    In this thesis, We propose three new types NDR circuits, which are MOS-HBT-NDR, MOS-NDR and R-HBT-NDR. These NDR circuits not only have fold feature but also high modulation in I-V characteristic. However, these NDR circuit is completed of the Si-based MOS and SiGe-based HBT devices, it is convenient to combine with other devices and circuits to achieve the system-on a-chip (SoC).
    Compared to the traditional RTD-based multiple-peak circuit, our novel
    two-peak MOS-HBT-NDR owns high and adjustable PVCR characteristic. These phenomena provide flexible applications in multiple-valued memory design. We have demonstrated several methods to output the logic levels as we need.
    We have fabricated the MOS-NDR circuits based on the standard 0.35 m CMOS process. We also have demonstrated the Multi-Function logic gate based on the MOS-NDR circuits. This circuit of logic gate design is operated according to the principle of MOBILE theory.
    We have proposed a novel frequency divider using an NDR-based chaos circuit. This chaos circuit is based on the strong nonlinearity of an R-HBT-NDR circuit. We have researched the operation of the frequency divider circuit with respect to the input frequency, the bias voltage, input amplitude, and various input waveforms on the operation. A higher operation frequency is expected for this type of frequency divider.

    Doctorate exam certificate of conformity I Abstract III Acknowledgements VII Contents IX List of Tables XI List of Figures XII Nomenclature XVII CHAPTER 1 Introduction 1 CHAPTER 2 Single-Peak NDR circuits 5 2.1 Introduction 5 2.2. NDR Circuits 5 2.2.1 MOS-HBT-NDR circuit 5 2.2.2. MOS-NDR circuit 8 2.2.3.R-HBT-NDR circuit 10 2.3 Modulation of NDR devices 11 CHAPTER 3 Multi-Function Logic Gate Design 17 3.1 Introduction 17 3.2 Device Structure and Operation 18 3.3 MOBILE Theory 20 3.4 Logic Circuit Design 23 3.5 Experiment Results 32 CHAPTER 4 Multiple-Peak NDR Circuits Design 37 4.1 Introduction 37 4.2 Circuit Analysis 37 4.2.1 Two NDR Device in Series 37 4.2.2 Two MOS-HBT-NDR Circuit in Parallel 43 CHAPTER 5 Multiple-Valued Memory Design 52 5.1 Introduction 52 5.2 Multiple-Valued Memory Design 53 5.2.1 Resistor as Load 53 5.2.2 Constant Current Source as Load 58 5.3 Design Example 66 CHAPTER 6 Frequency Divider 75 6.1 Introduction 75 6.2 Modulation of R-HBT-NDR 76 6.3 Frequency Divider Design 79 CHAPTER 7 Conclusion 86 REFERENCES 89 Curriculum Vitae (Chinese) 93

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