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研究生: 蔡喬甯
Cai, Ciao-Ning
論文名稱: 應用在WiMAX 系統之多頻帶低雜訊放大器之設計
Design of Multi-Band Low Noise Amplifier for WiMAX Applications
指導教授: 蘇炎坤
Su, Yan-Kuin
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2009
畢業學年度: 97
語文別: 英文
論文頁數: 83
中文關鍵詞: 多頻帶低雜訊放大器雙頻帶
外文關鍵詞: multi-band, LNA, dual-band
相關次數: 點閱:65下載:2
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  • 在射頻接收器前端電路中,包含低雜訊放大器與混頻器。低雜訊放
    大器為訊號被接收後的第一級,將接收後的訊號加以放大並減少雜訊,
    增加訊號傳輸的正確性,之後,訊號傳送至混頻器與本地振盪器所產生
    的本地訊號加以混頻,最後,產生的中頻訊號傳送至後段電路的數位系
    統調變。
    在本論文中,學生將提出數個射頻前端電路中的低雜訊放大器之設
    計,包含以下電路 : 應用在WiMAX 系統,使用切換式電感之多頻帶低雜
    訊放大器、應用在WiMAX 系統之雙頻電流在利用低雜訊放大器、應用在
    WiMAX 系統,使用主動式回授之雙頻低雜訊放大器。
    應用在WiMAX 系統,使用切換式電感之多頻帶低雜訊放大器,在輸
    出入匹配分別使用Source-Follow 和Common Gate 架構,達到寬頻效果。
    電路中,使用切換式電感,切換三個不同的頻帶,因面積的考量,將三
    個電感結合,以減少晶片面積。在2.3~2.7、3.3~3.8 和5.1~5.8 GHz 的S11
    與S22 低於-10dB,增益為13.4~16.8dB,雜訊指數為3.1~3.7dB,P1dB 與IIP3
    分為-17dBm 以上與-28dBm 以上,消耗功率為8mW。
    應用在WiMAX 系統之雙頻電流在利用低雜訊放大器,在輸出入匹配
    皆使用雙頻架構之LC 共振,達到雙頻的效果。本架構在中間級使用切換
    式電感,切換所需要之頻率。在2.3~2.7 和5.1~5.8 GHz 的S11 與S22 低於
    -10dB,增益分為17 和14.5dB,雜訊指數分別為3.4 和3.5dB,P1dB 分為-16
    和-15dB,IIP3 分別為-8 和-6dBm,消耗功率為8.1mW。
    II
    應用在WiMAX 系統,使用主動式回授之雙頻帶低雜訊放大器,本架
    構使用主動式回授與分壓的方式加以改善雜訊與線性度。在2.3~2.7 和
    5.1~5.8 GHz 的S11 與S22 低於-9dB,增益分為16.4 和14.4dB,雜訊指數分
    別為3 和3.7dB,P1dB 分為-13 和-10dB,IIP3 分別為-2 和-3dBm,消耗功率
    為8.7mW。
    本論文中之電路設計是以TSMC 0.18um CMOS 製程之進行模擬,並透
    過CIC 之申請下線,完成晶片之製作。

    In a radio-frequency front-end receiver, it includes low noise amplifier,
    oscillator, and mixer. A low noise amplifier is the first stage of a receiver. It
    can amplify the received signal and reduce the noise of whole system in order
    to improve the accuracy of transmission. The amplified signal will be mixed
    with a local signal in a mixer and then be down-converted into an
    intermediate-frequency signal.
    In this thesis, the primary research focuses on the design of low noise
    amplifiers for WiMAX applications. They include a multi-band low-noise
    amplifier using switching inductors, a dual-band current-reused low noise
    amplifier and a dual-band low noise amplifier using biasing circuit of active
    feedback.
    A multi-band low-noise amplifier using switching inductors for WiMAX
    applications is a cascaded circuit which input is a common-gate stage. That
    means that this circuit consists of two common-gate circuits. In the circuit, the
    configuration of switching inductors is composed of three inductors in series.
    The two inductors in the configuration can individually be switched on or off
    in order to operate in three frequency bands. S11 and S22 at 2.3~2.7, 3.3~3.8
    and 5.1~5.8 GHz are lower than -10 dB. Gains are between 13.4 and 16.8 dB.
    The circuit has P1dB greater than -18 dBm, IIP3 greater than -27 dBm for the
    operation of the two frequency bands. The power consumption is 8 mW.
    A dual-band current-reused low noise amplifier for WiMAX applications
    uses LC resonating networks at input and output to simultaneously arrive at
    the matching of reflection coefficient. S11 and S22 at 2.3~2.7 and 5.1~5.8
    IV
    GHz are lower than -10 dB. Maximum gains are 17 and 14.5 dB for the two
    frequency bands, respectively. The circuit has P1dB greater than -16 dBm,
    IIP3 greater than -8 dBm for the operation of the two frequency bands. The
    power consumption is 8.1 mW.
    A dual-band low noise amplifier using active feedback for WiMAX
    applications is a current-reused configuration like as the chip mentioned
    previously. The active feedback circuit is used to bias the amplifier and
    implement the input matching simultaneously. In addition, a voltage divider at
    the gate of the cascoding MOSFET is used to improve the noise and linearity.
    S11 and S22 at 2.3~2.7 and 5.1~5.8 GHz are lower than -9 dB. Maximum
    gains are 16.4 and 14.4 dB for the two frequency bands, respectively. The
    circuit has P1dB greater than -13 dBm, IIP3 greater than -3 dBm for the
    operation of the two frequency bands. The power consumption is 8.7 mW.
    The design of these circuits is based on the TSMC 0.18μm CMOS
    process. These chips have been fabricated by the support of CIC in Taiwan.
    The second circuit topology has been measured.

    Abstract (in Chinese) I Abstract (in English) III Contents V List of Tables IX List of Figures X Chapter 1 INTRODUCTION 1 1.1 Motivation 1 1.2 WiMAX RF Transceiver Architecture 3 1.3 Thesis Organization 4 Chapter 2 WiMAX(Worldwide Interoperability for Microwave Access) 5 2.1 Introduction to WiMAX 5 2.2 WIMAX Applications 6 Chapter 3 THEORIES OF DESIGNING RADIO FREQUENCY AMPLIFIERS 10 3.1 Scattering Parameters 10 3.2 Stability Considerations 12 3.3 Maximum Gain 14 3.4 Noise Analysis 15 3.5 Type of Noise 16 3.5.1 Thermal Noise of Resistor 16 3.5.2 Thermal Noise of MOSFET 17 3.5.3 Flicker Noise of MOSFET 19 3.5.4 1/f Noise Corner Frequency of MOSFET 20 3.5.5 Noise Figure 22 3.6 Nonlinear Characteristics 23 3.6.1 Harmonic Distortion 23 3.6.2 Gain Compression 24 3.6.3 Inter-modulation distortion, IMD 25 Chapter 4 DESIGN OF LOW NOISE AMPLIFIER 27 4.1 A Multi-Band Low Noise Amplifier Using Switch Inductor for WiMAX Applications 28 VIII 4.1.1 Cascoded Common-gate Configuration 28 4.1.2 Schematic Circuit of the Multi-band Cascoded Common-gate LNA 29 4.1.3 Input and Output Matching Network for Wide Bandwidth 30 4.1.4 MOSFET Switch with Floating Gate 31 4.1.5 Design of Switching Inductors for Frequency Band Selection 34 4.1.6 Results of Simulation 37 4.1.7 Layout of Chip 42 4.1.8 Measurement Consideration 43 4.1.9 Summary 44 4.2 A Dual-Band Current-Reused Low Noise Amplifier for WiMAX Applications 45 4.2.1 Inter-Stage 47 4.2.2 Input and Output Matching Network for Dual-Band 50 4.2.3 Schematic of Circuit 51 4.2.4 Switch Inductor Design 52 4.2.5 Results of Simulation and Measurement 54 4.26 Layout of Chip 60 4.2.7 Measurement Consideration 61 4.2.8 Summary 62 4.3 A Dual-Band Low Noise Amplifier Using Active Feedback for WiMAX Applications 63 4.3.1 Active feedback 64 4.3.2 Improve Linearity 66 4.3.3 Schematic of Circuit 67 4.3.4 Switch Inductor Design 68 4.3.5 Results of simulation 70 4.3.6 Layout of chip 75 4.3.7 Measurement consideration 76 4.3.8 Summary 77 Chapter 5 CONCLUSION AND FUTURE WORK 78 5.1 Conclusion 78 5.2 Future Work 79 References

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