| 研究生: |
邱捷飛 Chiu, Chieh-fei |
|---|---|
| 論文名稱: |
氧化鋅系列金屬-絕緣體-半導體光檢測器及異質結構元件的製備及研究 Fabrication and Study of ZnO-Based MIS Photodetectors and Heterostructure Devices |
| 指導教授: |
張守進
Chang, Shoou-Jinn |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 微電子工程研究所 Institute of Microelectronics |
| 論文出版年: | 2008 |
| 畢業學年度: | 96 |
| 語文別: | 英文 |
| 論文頁數: | 91 |
| 中文關鍵詞: | 光檢測器 、氧化鎂鋅 、濺鍍 、電晶體 、異質結構 、氧化鋅 |
| 外文關鍵詞: | sputter, HEMT, HFET, ZnO, heterostructure, MgZnO, PD, FET |
| 相關次數: | 點閱:93 下載:4 |
| 分享至: |
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本論文將分成二個部分來討論。第一部分在討論及分析金屬-絕緣體-半導體光檢測器元件的原理。在光檢測器的表現上,我們會希望能有大的光電流及極小的暗電流,以達到在370奈米的截止波段上有高的拒斥比。而在金屬與半導體之間置入一層絕緣體則是廣泛被使用於降低暗電流的方法。這部份的實驗,我們利用控制變因的方法來探討絕緣層厚度對光檢測的影響。並且引用電子穿透電流模型來對元件隨著絕緣層厚度不同所造成的光暗電流比先增後減趨勢作解釋。在二氧化矽98奈米厚的金屬-絕緣體-半導體光檢測器元件有最佳的表現,其中在偏壓5V時,拒斥比為2.7×102。
第二部分,由於異質結構產生的二維電子氣有較高的電子移動率,所以成長異質結構的元件一直是個熱門的研究方向。在本論文中,所有的氧化鋅皆是用靶材濺鍍的方式成長在玻璃基板上,以達到低溫低成本的優勢,並且更進ㄧ步用濺鍍的方式成長異質結構。迄今,尚未看到有用靶材濺鍍方式成長氧化鋅/氧化鎂鋅異質結構的相關文獻。我們亦製作光檢測器及場效電晶體,來比較氧化鎂鋅/氧化鋅異質結構元件與氧化鋅元件的差異性。同時也對不同的結構進行霍爾量測,其中異質結構的電子移動率可高達556.5cm2/Vs。異質結構的光檢測器比單氧化鋅的結構有較高於一個數量級的拒斥比。而單就氧化鋅的金氧半場效電晶體表現出適合在高壓操作的特性。此外,異質結構的金氧半場效電晶體則適合在低壓下操作且有較高的轉導值。
The main goal of this dissertation is the achievement of ZnO-based Optoelectronic Integrating Circuit (OEIC). Hence, the dissertation is divided into two parts, one is the discussion of ZnO-based metal-insulator-semiconductor (MIS) photodectors, and another is the discussion of heterostructure photodetectors and FETs.
In the discussion of MIS photodetectors, it can improve the performance further resulted from suppressing the dark current by the insulator. The large 2.7×102 UV to visible rejection ratio of 98nm-SiO2-thick MIS photodetector indicates that we can significantly enhance the rejection ratio by inserting a SiO2 layer into our ZnO photodetectors and suggests ZnO MIS photodetectors are potentially useful for practical applications. Furthermore, a proper tunneling mechanism is used to explain the trend of photo-to-dark ratio. In the discussion of MgZnO/MzO heterostructure devices, ZnO-based HMSM PDs, MOSFETs, and HFETs were all fabricated by RF-sputter for low cost and low growth-temperature, and the heterostructures also shows the higher electron mobility. In the part of HMSM PDs, the HMSM PDs shows the better performance than conventional MSM PDs. In the part of ZnO MOSFETs, the thinner ZnO thickness has smaller saturation voltage. In the part of HFETs, the bulk-annealing devices comes the better performance. In the conclusion of FETs, if we focus on high saturation current, large Gm, and low operation-voltage for logic application, the HFET with bulk-annealing shows the best performance. On the contrary, for high-voltage application, the 60nm-thick-ZnO MOSFET would be the focus, even the smaller Gm and saturation current.
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