本論文提出一高升壓比直流-直流轉換器，此架構藉由耦合電感的特性與切換電容結合以降低電容上的電流突波，且因為耦合電感之漏感續流特性減少二極體之逆向回復問題所帶來的損耗，並透過電容電壓的疊加降低輸入端傳輸能量至負載時的電流，以此獲得高電壓增益且提高效率。本文首先對提出之電路架構進行電路動作原理分析、連續與非連續模式下電路穩態特性及重要元件參數設計準則。最後以數位信號處理器TMS320F28335作為主控制器，實作一輸入電壓為24 - 38 V、輸出電壓為400 V 、額定輸出功率為300 W及切換頻率為50 kHz的轉換器。由實驗結果得知在輸入電壓為24 V時滿載效率為89.7%；輸入電壓為38 V時滿載效率為91%，而最高效率為輸入電壓為38 V在60 %負載時可達94 %。

In this thesis, a step-up DC-DC converter is proposed. This topology reduces the current spike on the switched capacitor and revers recovery problem of the diode by leakage inductor of coupled inductor. The cascaded technology not only increce output voltage in efficiently, but also decrece input current when input transfers energy to output. The steady-state operating principle of continuous conduct modes and discontinuous conduct modes, and key parameters design are discussed in detail. Finally, the digital signal processor, TMS320F28335 is used to realize the switching control and laboratory prototype with input voltage 24 – 38 V, output voltage 400 V, and rated output power 300 W was built and demonstrated. According to experimental results, the efficiency is 89.7% of full load at input voltage is 24 V, the eifficiency is 91% of full load at input voltage is 38 V, and the highest eifficiency is 94% at input voltage is 38 V.

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