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研究生: 黃煜庭
Huang, Yu-Ting
論文名稱: 透過 RTL 模型驗證辨識被 Spectre 攻擊的 RISC-V 處理器​
Identification of RISC-V processors attacked by Spectre with RTL model checking​
指導教授: 陳盈如
Chen, Yean-Ru
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2021
畢業學年度: 109
語文別: 中文
論文頁數: 46
中文關鍵詞: Spectre 攻擊 、正規驗證 、資訊安全
外文關鍵詞: Spectre attack, Formal Verification, Security
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  • 在現今各種架構的處理器,例如:x86, ARM, RISC-V 處理器... 等等,都追求高效能且廣泛的運用在家用電腦、伺服器、智慧型手機等等。然而,處理器關於資訊安全上的疑慮也開始逐漸受到重視。在現今,大多數的處理器都有使用分支預測(branch prediction) 和推測執行(speculative execution),藉以提高處理器的性能。Spectre 攻擊就是利用了猜測執行來執行會洩漏資料的程式片段,並利用了快取的特性將機密資料留在了快取的索引(cache index) 上,藉以獲取機密資料。本篇論文是透過模型驗證的驗證方法分辨出處理器是否會 Spectre 攻擊,而此攻擊是一種利用了分支預測、猜測執行和快取的側通道攻擊(cache-based side-channel attack)。我們致力於使用正規驗證的技術來偵測Spectre 攻擊,並且透過在硬體層級實作了緩解機制藉以證明所寫的正規模型驗證property 是可以幫我們分辨出處理器是否會被Spectre 攻擊所影響。
    在本篇論文的實驗中,我們使用了兩個開源的out-of-order RISC-V CPU,分別是BOOM(Berkeley Out-of-Order Machine) 處理器、RSD (RISC-V Out-of-Order Superscalar Processor) 處理器,而這兩顆處理器在跑Spectre 的攻擊程式碼時機密資料都會被竊取成功,且跑模型驗證時也會因為違反我們針對 Spectre 攻擊所設計的property 而跑出可以成功竊取資料的反例。另一方面,我們在 RSD 處理器上做了緩解機制來阻擋 Spectre 攻擊,並且透過跑 Spectre 的攻擊程式碼來看到可以有效抵擋住 Spectre 攻擊,同時我們針對有緩解機制的RSD 處理器的狀態空間爆炸問題,做了一些 reduction 來做模型驗證。

    Spectre attacks are revealed in early 2018. The attack exploits the speculative execu-tion and the side-channel such as cache to achieve leaking confidential data stored in the memory. In this work, we use RTL model checker to check if the processor is influ-enced by Spectre attack at hardware level. Moreover, we implement micro-architectural mitigation to block the Spectre attack. In the experimental results, we not only use the Spectre variant 1, variant 2, and 13 Spectre variants provided by Microsoft to compare the results between the mitigated and the non-mitigated out-of-order processor but also prove the proposed formal properties can distinguish the out-of-order processor with and without the micro-architectural mitigation.

    摘要 i 英文延伸摘要 ii 誌謝 vii 目錄 viii 表格 x 圖片 xi Chapter 1. Introduction 1 1.1. 研究動機 1 1.2. 處理器上的資訊安全問題- Spectre 攻擊 2 1.3. 本文貢獻 3 1.4. 本文組織 4 Chapter 2. Related Work 5 2.1. Spectre 攻擊 5 2.2. Spectre 攻擊的偵測 6 2.3. Spectre 攻擊的緩解機制 7 Chapter 3. Detection mechanism 9 3.1. 模型驗證介紹(Model Checking) 9 3.2. 安全性路徑驗證與汙點分析(Security Path Verification and Taint Analysis) 14 3.3. Spectre 攻擊流程與偵測 14 Chapter 4. Mitigation 17 4.1. 緩解機制架構介紹 17 4.1.1. SpeculativeDetect 模塊 17 4.1.2. SpeculativeStall 模塊 18 4.2. 新增SpeculativeStall 緩解機制後的驗證 19 Chapter 5. Evaluation 21 5.1. 實驗所用之亂序處理器介紹 21 5.1.1. BOOM (Berkeley Out-of-Order Machine) 處理器 21 5.1.2. RSD (RISC-V Out-of-Order Superscalar Processor) 處理器 22 5.2. 模擬結果 23 5.3. 使用RTL 模型驗證器來驗證Spectre 攻擊 26 5.3.1. phase 1 property 和phase 2 property 設定與膠水邏輯(Glue Logic) 26 5.3.2. 模型驗證結果 29 5.3.3. 加入緩解機制的RSD 處理器之phase 1 模型驗證 31 5.3.4. 加入緩解機制的RSD 處理器之phase 2 模型驗證 43 Chapter 6. Conclusion 44 References 45

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