本論文提出一有效降低雜訊方法，透過被動電感回授消除電晶體通道雜訊，有效將低整體雜訊指數。並通過正負耦合設計對整體系統產生頻寬拓寬或轉導提升的效果。而架構上在低雜訊放大器或整體接收機架構皆採用電流再利用技巧，以達到低功耗的設計。
接下來兩部分為晶片設計的部分，第一部分提出低雜訊放大器架構，在雜訊表現透過電感耦合對電晶體通道雜訊進行雜訊相消；在增益以及頻寬表現透過電感正負耦合，達到轉導提升以及頻寬拓寬的表現；在功耗的部分以兩級互補式共源級架構再對其進行電流再利用達到低功耗的效果。在模擬結果中達到最高增益14.7 dB，頻寬14.1 GHz，雜訊指數最低1.71 dB的雜訊表現。
在第二部分中提出接收機架構，為振盪器與低雜訊放大器電流再利用而設計的架構，在混頻器的部分採用被動設計，整體朝低功耗方向進行設計。在低雜訊放大器設計的部分，採用三重變壓器設計，具有將單端訊號轉換為差動訊號、消除通道雜訊、提升整體轉導等優勢。本架構同時提出透過防止振盪訊號洩漏架構以及閘極汲極電容抵銷技術降低振盪訊號洩漏，有55 dB的抑制表現。在模擬結果中，功耗的部分擁有僅11.48 mW，在增益有34 dB，雜訊指數有6.7 dB的表現。

This paper proposes an effective method for noise cancellation by eliminating transistor channel noise through passive inductive feedback, significantly lowering the overall noise figure. The design employs positive and negative coupling to achieve bandwidth extension and transconductance boosting in the system. Both the LNA and the overall receiver architecture utilize current reuse techniques to achieve low power consumption.
The chip design is presented in two parts. The first part introduces a complementary LNA topology. Noise performance is improved through inductive coupling for channel noise cancellation. Gain and bandwidth are enhanced via positive and negative inductive coupling, leading to transconductance boosting and bandwidth extension. Power consumption is minimized using a two-stage complementary common-source architecture with current reuse. Simulation results demonstrate a maximum gain of 14.7 dB, bandwidth of 14.1 GHz, and a minimum noise figure of 1.71 dB.
The second part proposes a receiver architecture designed for current reuse between the VCO and LNA, employing a passive mixer design for overall low power consumption. The LNA incorporates a triple transformer design, offering advantages such as single-ended to differential signal conversion, channel noise cancellation, and overall transconductance boosting. This architecture also introduces techniques to reduce oscillator signal leakage, including a leakage prevention structure and gate-drain capacitance cancellation, achieving 55 dB of suppression. Simulation results show a power consumption of 11.48 mW, a gain of 34 dB, and a noise figure of 6.7 dB.

[1] Z. Deng, J. Zhou, H. J. Qian, and X. Luo, "A 22.9–38.2-GHz Dual-Path Noise-Canceling LNA With 2.65–4.62-dB NF in 28-nm CMOS," IEEE Journal of Solid-State Circuits, vol. 56, no. 11, pp. 3348-3359, 2021, doi: 10.1109/JSSC.2021.3102602.
[2] R. Wang, C. Li, J. Zhang, S. Yin, W. Zhu, and Y. Wang, "A 18–44 GHz Low Noise Amplifier With Input Matching and Bandwidth Extension Techniques," IEEE Microwave and Wireless Components Letters, vol. 32, no. 9, pp. 1083-1086, 2022, doi: 10.1109/LMWC.2022.3163462.
[3] C. Zhao et al., "A K-/Ka-Band Broadband Low-Noise Amplifier Based on the Multiple Resonant Frequency Technique," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 8, pp. 3202-3211, 2022, doi: 10.1109/TCSI.2022.3174292.
[4] J. Wan, X. Li, F. Han, Q. Qi, X. Liu, and Z. Chen, "A 19.6–39.4 GHz Broadband Low Noise Amplifier Based on Triple-Coupled Technique and T-Coil Network in 65-nm CMOS," Electronics, vol. 11, no. 12, doi: 10.3390/electronics11121833.
[5] H. Chen, H. Zhu, L. Wu, W. Che, and Q. Xue, "A Wideband CMOS LNA Using Transformer-Based Input Matching and Pole-Tuning Technique," IEEE Transactions on Microwave Theory and Techniques, vol. 69, no. 7, pp. 3335-3347, 2021, doi: 10.1109/TMTT.2021.3074160.
[6] X. Huang, H. Jia, W. Deng, Z. Wang, and B. Chi, "28 GHz Compact LNAs with 1.9 dB NF Using Folded Three-Coil Transformer and Dual-Feedforward Techniques in 65nm CMOS," in 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 19-21 June 2022 2022, pp. 223-226, doi: 10.1109/RFIC54546.2022.9863182.
[7] Y. Hu and T. Chi, "A 27–46-GHz Low-Noise Amplifier With Dual-Resonant Input Matching and a Transformer-Based Broadband Output Network," IEEE Microwave and Wireless Components Letters, vol. 31, no. 6, pp. 725-728, 2021, doi: 10.1109/LMWC.2021.3059592.
[8] Y. Yu et al., "A 21-to-41-GHz High-Gain Low Noise Amplifier With Triple-Coupled Technique for Multiband Wireless Applications," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 6, pp. 1857-1861, 2021, doi: 10.1109/TCSII.2020.3047726.
[9] J. Ke, G. Feng, and Y. Wang, "A 52-to-73GHz Tri-Coupled Transformer Based Noise Self-Canceling and Gm-Boosting LNA with 3.78dB NF and 22.4dB Gain in 40nm CMOS," in 2023 IEEE Custom Integrated Circuits Conference (CICC), 23-26 April 2023 2023, pp. 1-2, doi: 10.1109/CICC57935.2023.10121239.
[10] M. H. Tsai, S. S. H. Hsu, F. L. Hsueh, and C. P. Jou, "ESD-Protected K-Band Low-Noise Amplifiers Using RF Junction Varactors in 65-nm CMOS," IEEE Transactions on Microwave Theory and Techniques, vol. 59, no. 12, pp. 3455-3462, 2011, doi: 10.1109/TMTT.2011.2170582.
[11] X. Meng and R. Zhou, "A K-Band Ultra-Compact Gm-Boost LNA Using One Multi-Coupled Transformer in 65-nm CMOS," IEEE Microwave and Wireless Components Letters, vol. 32, no. 8, pp. 976-978, 2022, doi: 10.1109/LMWC.2022.3155669.
[12] S. Mondal, R. Singh, A. I. Hussein, and J. Paramesh, "A 25–30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication," IEEE Journal of Solid-State Circuits, vol. 53, no. 5, pp. 1275-1287, 2018, doi: 10.1109/JSSC.2018.2789402.
[13] H. T. Kim et al., "A 28-GHz CMOS Direct Conversion Transceiver With Packaged $2 imes 4$ Antenna Array for 5G Cellular System," IEEE Journal of Solid-State Circuits, vol. 53, no. 5, pp. 1245-1259, 2018, doi: 10.1109/JSSC.2018.2817606.
[14] D. Li et al., "A 24 GHz Direct Conversion Receiver for FMCW Ranging Radar Based on Low Flicker Noise Mixer," Electronics, vol. 10, no. 6, doi: 10.3390/electronics10060722.
[15] X. Yi et al., "A 24/77 GHz Dual-Band Receiver for Automotive Radar Applications," IEEE Access, vol. 7, pp. 48053-48059, 2019, doi: 10.1109/ACCESS.2019.2904493.
[16] C. Friesicke, P. Feuerschütz, R. Quay, O. Ambacher, and A. F. Jacob, "A 40 dBm AlGaN/GaN HEMT power amplifier MMIC for SatCom applications at K-band," in 2016 IEEE MTT-S International Microwave Symposium (IMS), 22-27 May 2016 2016, pp. 1-4, doi: 10.1109/MWSYM.2016.7540203.
[17] J. Zhang, D. Zhao, and X. You, "A 20-GHz 1.9-mW LNA Using gm-Boost and Current-Reuse Techniques in 65-nm CMOS for Satellite Communications," IEEE Journal of Solid-State Circuits, vol. 55, no. 10, pp. 2714-2723, 2020, doi: 10.1109/JSSC.2020.2995307.
[18] G. d. Jong, D. Leenaerts, and E. v. d. Heijden, "A fully integrated down-converter for Ka-band VSAT satellite reception," in 2012 Proceedings of the ESSCIRC (ESSCIRC), 17-21 Sept. 2012 2012, pp. 129-132, doi: 10.1109/ESSCIRC.2012.6341306.
[19] G. W. d. Jong, D. M. W. Leenaerts, and E. v. d. Heijden, "A Fully Integrated Ka-Band VSAT Down-Converter," IEEE Journal of Solid-State Circuits, vol. 48, no. 7, pp. 1651-1658, 2013, doi: 10.1109/JSSC.2013.2253236.
[20] X. Fu et al., "A Low-Power Radiation-Hardened Ka-Band CMOS Phased-Array Receiver for Small Satellite Constellation," IEEE Journal of Solid-State Circuits, vol. 59, no. 2, pp. 349-363, 2024, doi: 10.1109/JSSC.2023.3308562.
[21] Y. Yuan et al., "A Compact Ka-Band Eight-Element Four-Beam Receiver for Low-Earth-Orbit Satellite Communications in 65-nm CMOS," IEEE Microwave and Wireless Technology Letters, vol. 33, no. 6, pp. 883-886, 2023, doi: 10.1109/LMWT.2023.3265022.
[22] X. Fu et al., "A Low-Power 256-Element Ka-Band CMOS Phased-Array Receiver With On-Chip Distributed Radiation Sensors for Small Satellite Constellations," IEEE Journal of Solid-State Circuits, vol. 58, no. 12, pp. 3380-3395, 2023, doi: 10.1109/JSSC.2023.3312535.
[23] Z. Deng, C. Han, Y. Li, H. J. Qian, and X. Luo, "A 23–40-GHz Phased-Array Receiver Using 14-Bit Phase-Gain Manager and Wideband Noise-Canceling LNA," IEEE Journal of Solid-State Circuits, vol. 58, no. 3, pp. 647-661, 2023, doi: 10.1109/JSSC.2022.3223373.
[24] Z. Zhang et al., "6G Wireless Networks: Vision, Requirements, Architecture, and Key Technologies," IEEE Vehicular Technology Magazine, vol. 14, no. 3, pp. 28-41, 2019, doi: 10.1109/MVT.2019.2921208.
[25] A. Liscidini, A. Mazzanti, R. Tonietto, L. Vandi, P. Andreani, and R. Castello, "Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell," IEEE Journal of Solid-State Circuits, vol. 41, no. 12, pp. 2832-2841, 2006, doi: 10.1109/JSSC.2006.884824.
[26] Z. Lin, P. I. Mak, and R. P. Martins, "A 2.4 GHz ZigBee Receiver Exploiting an RF-to-BB-Current-Reuse Blixer + Hybrid Filter Topology in 65 nm CMOS," IEEE Journal of Solid-State Circuits, vol. 49, no. 6, pp. 1333-1344, 2014, doi: 10.1109/JSSC.2014.2311793.
[27] M. Tedeschi, A. Liscidini, and R. Castello, "Low-Power Quadrature Receivers for ZigBee (IEEE 802.15.4) Applications," IEEE Journal of Solid-State Circuits, vol. 45, no. 9, pp. 1710-1719, 2010, doi: 10.1109/JSSC.2010.2053861.
[28] A. Selvakumar, M. Zargham, and A. Liscidini, "Sub-mW Current Re-Use Receiver Front-End for Wireless Sensor Network Applications," IEEE Journal of Solid-State Circuits, vol. 50, no. 12, pp. 2965-2974, 2015, doi: 10.1109/JSSC.2015.2461019.
[29] A. Zolfaghari and B. Razavi, "A low-power 2.4-GHz transmitter/receiver CMOS IC," IEEE Journal of Solid-State Circuits, vol. 38, no. 2, pp. 176-183, 2003, doi: 10.1109/JSSC.2002.807580.
[30] W. To-Po et al., "A low-power oscillator mixer in 0.18-/spl mu/m CMOS technology," IEEE Transactions on Microwave Theory and Techniques, vol. 54, no. 1, pp. 88-95, 2006, doi: 10.1109/TMTT.2005.861671.
[31] H. Yu, Y. Chen, C. C. Boon, P. I. Mak, and R. P. Martins, "A 0.096-mm $^{2}~1$ –20-GHz Triple-Path Noise- Canceling Common-Gate Common-Source LNA With Dual Complementary pMOS–nMOS Configuration," IEEE Transactions on Microwave Theory and Techniques, vol. 68, no. 1, pp. 144-159, 2020, doi: 10.1109/TMTT.2019.2949796.
[32] F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, "Noise cancelling in wideband CMOS LNAs," in 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315), 7-7 Feb. 2002 2002, vol. 1, pp. 406-407 vol.1, doi: 10.1109/ISSCC.2002.993104.
[33] L. Chih-Fan and L. Shen-Iuan, "A broadband noise-canceling CMOS LNA for 3.1-10.6-GHz UWB receiver," in Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005., 21-21 Sept. 2005 2005, pp. 161-164, doi: 10.1109/CICC.2005.1568632.
[34] C. F. Liao and S. I. Liu, "A Broadband Noise-Canceling CMOS LNA for 3.1–10.6-GHz UWB Receivers," IEEE Journal of Solid-State Circuits, vol. 42, no. 2, pp. 329-339, 2007, doi: 10.1109/JSSC.2006.889356.
[35] S. K. Khyalia, R. H. Zele, C. C. Chiong, and H. Wang, "A 22–33-GHz Gm-Boosting Low-Power Noise-Canceling LNA in 40-nm CMOS Process," IEEE Transactions on Microwave Theory and Techniques, vol. 72, no. 7, pp. 4017-4027, 2024, doi: 10.1109/TMTT.2024.3349605.
[36] L. Wu, H. F. Leung, and H. C. Luong, "Design and Analysis of CMOS LNAs with Transformer Feedback for Wideband Input Matching and Noise Cancellation," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 6, pp. 1626-1635, 2017, doi: 10.1109/TCSI.2017.2649844.
[37] B. Razavi, RF Microelectronics (2nd Edition) (Prentice Hall Communications Engineering and Emerging Technologies Series). Prentice Hall Press, 2011.
[38] G. Feng et al., "Pole-Converging Intrastage Bandwidth Extension Technique for Wideband Amplifiers," IEEE Journal of Solid-State Circuits, vol. 52, no. 3, pp. 769-780, 2017, doi: 10.1109/JSSC.2016.2641459.
[39] Y. Yuan, J. Li, B. Yuan, J. Zeng, J. Fan, and Z. Yu, "Analysis and Design of a Gain-Enhanced 1–20-GHz LNA With Output-Stage Transformer Feedback," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 9, pp. 3539-3543, 2023, doi: 10.1109/TCSII.2023.3263503.
[40] C. Choong-Yul and L. Sang-Gug, "A 5.2GHz LNA in 0.35 µm CMOS utilizing inter-stage series resonance and optimizing the substrate resistance," in Proceedings of the 28th European Solid-State Circuits Conference, 24-26 Sept. 2002 2002, pp. 339-342.
[41] T. Taris, J. B. Begueret, H. Lapuyade, and Y. Deval, "A 1-V 2GHz VLSI CMOS low noise amplifier," in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003, 9-10 June 2003 2003, pp. 123-126, doi: 10.1109/RFIC.2003.1213908.
[42] H. H. Hsieh and L. H. Lu, "Design of Ultra-Low-Voltage RF Frontends With Complementary Current-Reused Architectures," IEEE Transactions on Microwave Theory and Techniques, vol. 55, no. 7, pp. 1445-1458, 2007, doi: 10.1109/TMTT.2007.900208.
[43] C. M. Chou and K. W. Cheng, "A sub-2 dB noise-figure 2.4 GHz LNA employing complementary current reuse and transformer coupling," in 2016 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), 24-26 Aug. 2016 2016, pp. 1-3, doi: 10.1109/RFIT.2016.7578198.
[44] B. Razavi, "Design considerations for direct-conversion receivers," IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 44, no. 6, pp. 428-435, 1997, doi: 10.1109/82.592569.
[45] D. K. Shaeffer and T. H. Lee, "A 1.5-V, 1.5-GHz CMOS low noise amplifier," IEEE Journal of Solid-State Circuits, vol. 32, no. 5, pp. 745-759, 1997, doi: 10.1109/4.568846.
[46] G. Jung-Suk, A. Hee-Tae, D. J. Ladwig, Y. Zhiping, T. H. Lee, and R. W. Dutton, "A noise optimization technique for integrated low-noise amplifiers," IEEE Journal of Solid-State Circuits, vol. 37, no. 8, pp. 994-1002, 2002, doi: 10.1109/JSSC.2002.800956.
[47] F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, "Wide-band CMOS low-noise amplifier exploiting thermal noise canceling," IEEE Journal of Solid-State Circuits, vol. 39, no. 2, pp. 275-282, 2004, doi: 10.1109/JSSC.2003.821786.
[48] D. B. Leeson, "A simple model of feedback oscillator noise spectrum," Proceedings of the IEEE, vol. 54, no. 2, pp. 329-330, 1966, doi: 10.1109/PROC.1966.4682.
[49] M. Giuseppe, "Comparison of Voltage-Controlled-Oscillator Architectures for Implementation in 180 nm SiGe Technology," 2016.
[50] H. Yu, Y. Chen, C. C. Boon, C. Li, P. I. Mak, and R. P. Martins, "A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 1, pp. 71-75, 2019, doi: 10.1109/TCSII.2018.2833553.
[51] S. Shekhar, J. S. Walling, S. Aniruddhan, and D. J. Allstot, "CMOS VCO and LNA Using Tuned-Input Tuned-Output Circuits," IEEE Journal of Solid-State Circuits, vol. 43, no. 5, pp. 1177-1186, 2008, doi: 10.1109/JSSC.2008.920360.
[52] M. Vigilante and P. Reynaert, "On the Design of Wideband Transformer-Based Fourth Order Matching Networks for ${E}$ -Band Receivers in 28-nm CMOS," IEEE Journal of Solid-State Circuits, vol. 52, no. 8, pp. 2071-2082, 2017, doi: 10.1109/JSSC.2017.2690864.
[53] J. Moody, S. Lepkowski, and T. Forbes, "A mmW Receiver Exploiting Complementary Current Reuse and Power Efficient Bias Point," IEEE Transactions on Microwave Theory and Techniques, vol. 72, no. 3, pp. 1706-1718, 2024, doi: 10.1109/TMTT.2023.3308907.
[54] A. V. Do, C. C. Boon, M. A. Do, K. S. Yeo, and A. Cabuk, "A Subthreshold Low-Noise Amplifier Optimized for Ultra-Low-Power Applications in the ISM Band," IEEE Transactions on Microwave Theory and Techniques, vol. 56, no. 2, pp. 286-292, 2008, doi: 10.1109/TMTT.2007.913366.
[55] J. Yang, J. Lee, S. Jang, H. Jeong, and C. Park, "Ka-Band Three-Stack CMOS Power Amplifier with Split Layout of External Gate Capacitor for 5G Applications," Electronics, vol. 12, p. 432, 01/13 2023, doi: 10.3390/electronics12020432.