本論文探究設計應用於低功耗低電壓感測器之K-band注入鎖定除三除頻器整合電路；整合電路方面分為兩部分，包含K-band的低雜訊放大器與注入鎖定除三除頻器，且針對注入鎖定除三除頻器的子電路再作寬鎖定範圍改良。在論文中整合與改良電路皆使用TSMC 0.18-μm CMOS製程進行下線。
所設計的K-band注入鎖定除頻器整合電路是利用低雜訊放大器將注入訊號放大來提升下一級除頻器的靈敏度，並且可以降低注入訊號基頻外的雜訊，而注入鎖定除三除頻器採用了交互耦合對注入技巧進行設計，藉此可以操作在低電壓與低功耗的條件下。量測結果顯示，自由振盪中心頻率約落在7.651 GHz，當注入功率為0 dBm時，整體系統的鎖定範圍由21.4 GHz到24 GHz約為2.6 GHz，鎖定範圍比率約為11.4%，靈敏度約為-35 dBm。此電路中，低雜訊放大器功耗為4.32 mW，而注入鎖定除頻器功耗為1.93 mW。
改良注入鎖定除三除頻器的部分在於結合考畢茲振盪器核心架構將輸出電壓擺幅加大進而增加鎖定範圍，並且在回授點採用電感取代電流源的方式藉此降低跨壓使電路能操作在低電壓的條件下，並加入變容器元件設計，藉由控制電壓使自由振盪頻率變化同樣也有增加鎖定範圍的效益。此電路供應電壓為0.6 V且功耗為3.12 mW。量測結果中，當變容器容值為最大和最小值時，此除頻器之自由振盪頻率分別為7.39 GHz及8.08 GHz，調整範圍為690 MHz。鎖定範圍由22.15到24.43 GHz約為2.28 GHz，鎖定範圍比率約為9.78%，靈敏度約為-10 dBm。此除頻器之工作頻段範圍涵蓋部分K-band，適合應用於雷達系統或感測器之整合。

This thesis is to design a K-band divide-by-three injection-locked frequency divider (ILFD) integrated circuit for low-power and low-voltage sensor applications. The integrated circuit is divided into two parts: a K-band low noise amplifier and an injection-locked frequency divider. And the sub-circuit of divide-by-three ILFD is further improved with wide locking range. The integrated and improved circuits in this thesis are all fabricated by TSMC 0.18-μm CMOS process.
The first design of this integrated circuit uses a low noise amplifier to amplify the injection signal and directly improve the sensitivity of the next ILFD stage. And this design also can reduce the noise spectrum outside the locking range of the injection signal. We adopt the topology of the divide-by-three ILFD with an injection-switched cross-coupled pair (IS-CPP) technique so that it can operate under conditions of low voltage and low power consumption. The free-running frequency is at 7.651 GHz observed from the measurement results. When the input power of the injection signal is -10 dBm, the measured locking range is 2.6 GHz (between 21.4 GHz and 24 GHz). The ratio of locking range is about 11.4%. And the sensitivity is -35 dBm. The power consumptions of the LNA and the ILFD are 4.32 mW and 1.93 mW, respectively.
The second circuit design is to continuously increase the locking range of divide-by-three ILFD. The improved divide-by-three ILFD enhances the output voltage swing by utilizing a Colpitts oscillator core to increase the locking range. And it also uses a varator to tuning the free-running frequency by a control voltage to has the benefit of increasing the locking range. The power consumption is 3.12 mW at 0.6 V supply voltage. When the capacitance of the varator is at the maximum and minimum value, the free-running frequencies of this divider are 7.39 GHz and 8.08 GHz, respectively. The measured tunning range is 690 MHz. The locking range is from 22.15 to 24.43 GHz, about 2.28 GHz. And the ratio of locking range is about 9.78%. the sensitivity is about -10 dBm. The bandwidth of this frequency divider covers part of the K-band and is also suitable for the integrated circuit of radar systems or sensors.

[1] L. Yujiri, M. Shoucri, and P. Moffa. "Passive millimeter wave imaging." IEEE microwave magazine 4.3(2003): 39-50.
[2] S. Ladan and K. Wu, "High efficiency low-power microwave rectifier for wireless energy harvesting," 2013 IEEE MTT-S International Microwave Symposium Digest (MTT), Seattle, WA, 2013, pp. 1-4.
[3] J. Bae and H. Yoo, "A low energy injection-locked FSK transceiver with frequency-to-amplitude conversion for body sensor applications," 2010 Symposium on VLSI Circuits, Honolulu, HI, 2010, pp. 133-134.
[4] Hui Wu and Lin Zhang, "A 16-to-18GHz 0.18-m Epi-CMOS Divide-by-3 Injection-Locked Frequency Divider," 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers, San Francisco, CA, 2006, pp. 2482-2491.
[5] S. Jang, W. Cheng and C. Hsue, "Wide-Locking Range Divide-by-3 Injection-Locked Frequency Divider Using Sixth-Order RLC Resonator," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 7, pp. 2598-2602, July 2016.
[6] B. Seow, T. Huang, C. Wu, P. Pao and H. Chuang, "A Low-Voltage 30-GHz CMOS Divide-by-Three ILFD With Injection-Switched Cross-Coupled Pair Technique," in IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 5, pp. 1560-1568, May 2017.
[7] R. Adler, “A study of locking phenomena in oscillator,” Proceedings of the IRE, vol. 34, no. 6,pp. 351–357, June 1946
[8] B. Razavi, "A study of injection locking and pulling in oscillators," in IEEE Journal of Solid-State Circuits, vol. 39, no. 9, pp. 1415-1424, Sept. 2004.
[9] W. Hui and A. Hajimiri, "A 19 GHz 0.5 mW 0.35 /spl mu/m CMOS frequency divider with shunt-peaking locking-range enhancement," 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177), San Francisco, CA, USA, 2001, pp. 412-413,
[10] A. Mirzaei, M. E. Heidari, R. Bagheri, S. Chehrazi and A. A. Abidi, "The Quadrature LC Oscillator: A Complete Portrait Based on Injection Locking," in IEEE Journal of Solid-State Circuits, vol. 42, no. 9, pp. 1916-1932, Sept. 2007
[11] X.Yanming,L. Jenshan, O. Boric-Lubecke and V. M. Lubecke, "A Ka-Band Low Power Doppler Radar System for Remote Detection of Cardiopulmonary Motion," 2005 IEEE Engineering in Medicine and Biology 27th Annual Conference, Shanghai, 2005.
[12] T. Sugiura and S. Sugimoto, "FM noise reduction of Gunn-effect oscillators by injection locking," in Proceedings of the IEEE, vol. 57, no. 1, pp. 77-78, Jan. 1969.
[13] M. E. Hines, J. -. R. Collinet and J. G. Ondria, "FM Noise Suppression of an Injection Phase-Locked Oscillator," in IEEE Transactions on Microwave Theory and Techniques, vol. 16, no. 9, pp. 738-742, September 1968.
[14] M. Tiebout, "A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider," in IEEE Journal of Solid-State Circuits, vol. 39, no. 7, pp. 1170-1174, July 2004.
[15] H. R. Rategh and T. H. Lee, "Superharmonic injection-locked frequency dividers," in IEEE Journal of Solid-State Circuits, vol. 34, no. 6, pp. 813-821, June 1999.
[16] S. Verma, H. R. Rategh and T. H. Lee, "A unified model for injection-locked frequency dividers," in IEEE Journal of Solid-State Circuits, vol. 38, no. 6, pp. 1015-1027, June 2003.
[17] T. Luo, S. Bai and Y. E. Chen, "A 60-GHz 0.13-μm CMOS Divide-by-Three Frequency Divider," in IEEE Transactions on Microwave Theory and Techniques, vol. 56, no. 11, pp. 2409-2415, Nov. 2008.
[18] P. Tsai, C. Liu and T. Huang, "Wideband injection-locked divide-by-3 frequency divider design with regenerative second-harmonic feedback technique," 2012 7th European Microwave Integrated Circuit Conference, Amsterdam, 2012, pp. 293-296.
[19] S. Jang, C. Lin and M. Juang, "Enhanced locking range technique for divide-by-3 differential injection-locked frequency divider," in Electronics Letters, vol. 51, no. 6, pp. 456-458, 19 3 2015.
[20] J. Kim, S. Lee and D. Choi, "Injection-Locked Frequency Divider Topology and Design Techniques for Wide Locking-Range and High-Order Division," in IEEE Access, vol. 5, pp. 4410-4417, 2017.
[21] J. Wu, C. Chen, H. Kao, J. Chen and M. Tu, "Divide-by-Three Injection-Locked Frequency Divider Combined With Divide-by-Two Locking," in IEEE Microwave and Wireless Components Letters, vol. 23, no. 11, pp. 590-592, Nov. 2013.
[22] K. Cheng, K. Natarajan and D. J. Allstot, "A Current Reuse Quadrature GPS Receiver in 0.13 um CMOS," in IEEE Journal of Solid-State Circuits, vol. 45, no. 3, pp. 510-523, March 2010.
[23] H. Lee and S. Mohammadi, "A Subthreshold Low Phase Noise CMOS LC VCO for Ultra Low Power Applications," in IEEE Microwave and Wireless Components Letters, vol. 17, no. 11, pp. 796-798, Nov. 2007.
[24] B. Jungnam, R. S. C. Teja, J. Ikkyun, K. Takao and M.Toshimasa, "A subthreshold low-voltage low-phase-noise CMOS LC-VCO with resistive biasing." in Circuits and Systems, pp. 136-142, May 2015
[25] A. V. Do, C. C. Boon, M. A. Do, K. S. Yeo and A. Cabuk, "A Subthreshold Low-Noise Amplifier Optimized for Ultra-Low-Power Applications in the ISM Band," in IEEE Transactions on Microwave Theory and Techniques, vol. 56, no. 2, pp. 286-292, Feb. 2008.
[26] B. G. Perumana, S. Chakraborty, Chang-Ho Lee and J. Laskar, "A fully monolithic 260-μW, 1-GHz subthreshold low noise amplifier," in IEEE Microwave and Wireless Components Letters, vol. 15, no. 6, pp. 428-430, June 2005.
[27] W. Lin, J. Tsai, Y. Jen, T. Huang and H. Wang, "A 0.7-V 60-GHz low-power LNA with forward body bias technique in 90 nm CMOS process," 2009 European Microwave Conference (EuMC), Rome, 2009, pp. 393-396.
[28] T. K. Nguyen, N. J. Oh, H. C. Choi, K. J. Ihm and S. G. Lee, "CMOS low noise amplifier design optimization technique," The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04., Hiroshima, Japan, 2004.
[29] "Bibliography of Power System Harmonics, Part I IEEE Power System Harmonics Working Group Report," in IEEE Power Engineering Review, vol. PER-4, no. 9, pp. 58-58, Sept. 1984.
[30] K. Chien, J. Chen and H. Chiou, "Designs of K-Band Divide-by-2 and Divide-by-3 Injection-Locked Frequency Divider With Darlington Topology," in IEEE Transactions on Microwave Theory and Techniques, vol. 63, no. 9, pp. 2877-2888, Sept. 2015.
[31] Y. Yeh and H. Chang, "Design and Analysis of a W-band Divide-by-Three Injection-Locked Frequency Divider Using Second Harmonic Enhancement Technique," in IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 6, pp. 1617-1625, June 2012.
[32] A. Mazzanti, P. Uggetti and F. Svelto, "Analysis and design of injection-locked LC dividers for quadrature generation," in IEEE Journal of Solid-State Circuits, vol. 39, no. 9, pp. 1425-1433, Sept. 2004.
[33] Y. Chen, M. Li, H. Kuo, T. Huang and H. Chuang, "Low-Voltage K-Band Divide-by-3 Injection-Locked Frequency Divider With Floating-Source Differential Injector," in IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 1, pp. 60-67, Jan. 2012.
[34] Q. Gu et al., "A Low Power V-Band CMOS Frequency Divider With Wide Locking Range and Accurate Quadrature Output Phases," in IEEE Journal of Solid-State Circuits, vol. 43, no. 4, pp. 991-998, April 2008.
[35] K. Lin et al., "A 4.2-mW 6-dB Gain 5–65-GHz Gate-Pumped Down-Conversion Mixer Using Darlington Cell for 60-GHz CMOS Receiver," in IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 4, pp. 1516-1522, April 2013.
[36] S. Jang, J. Luo, C. Chang, C. Lee and J. Huang, "LC-Tank Colpitts Injection-Locked Frequency Divider With Even and Odd Modulo," in IEEE Microwave and Wireless Components Letters, vol. 19, no. 2, pp. 113-115, Feb. 2009.
[37] C. Lee, S. Jang and M. -. Juang, "A Wide Locking Range Differential Colpitts Injection Locked Frequency Divider," in IEEE Microwave and Wireless Components Letters, vol. 17, no. 11, pp. 790-792, Nov. 2007.
[38] S. Jang, et al. "A low power CMOS divide‐by‐3 LC‐tank injection locked frequency divider." Microwave and Optical Technology Letters, pp. 259-263, Jan. 2008.
[39] C.Y. Cha and S.G. Lee, "A complementary Colpitts oscillator based on 0.35 /spl mu/m CMOS technology," ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), Estoril, Portugal, 2003, pp. 691-694.
[40] H. Hsieh and L. Lu, "A High-Performance CMOS Voltage-Controlled Oscillator for Ultra-Low-Voltage Operations," in IEEE Transactions on Microwave Theory and Techniques, vol. 55, no. 3, pp. 467-473, March 2007.
[41] H.H. Hsieh and L.H. Lu, "A low-phase-noise K-band CMOS VCO," in IEEE Microwave and Wireless Components Letters, vol. 16, no. 10, pp. 552-554, Oct. 2006.
[42] S. Jang, R. Yang, C. Chang and M. Juang, "Multi-Modulus LC Injection-Locked Frequency Dividers Using Single-Ended Injection," in IEEE Microwave and Wireless Components Letters, vol. 19, no. 5, pp. 311-313, May 2009.
[43] S. Jang, W. Lai, S. Tzeng and C. Hsue, "A wide-band divide-by-3 injection-locked frequency divider using tunable MOS resistor," 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC), Xiamen, 2015, pp. 1-5.