本論文在探討一應用於生醫訊號系統之三角積分類比數位轉換器，並利用溫度感測器來驗證整個系統的可行性。此三角積分類比數位轉換器，前級為二加二階MASH架構的三角積分調變器，使用TSMC 0.18um CMOS製程，在取樣頻率1MHz、訊號頻寬4kHz、超取樣率為128倍的情形下，SNR可達到84.14dB，具有十三位元的解析度。接著就調變器的規格，來設計後端的數位降頻濾波器，將取樣頻率降回兩倍頻寬。此數位降頻濾波器利用verilog硬體描述語言撰寫，並載入FPGA做硬體實體驗證，如此便完成三角積分轉換器系統。

　　最後利用溫度感測器來驗證本系統的可行性，使用CMOS垂直寄生BJT做為溫度感測元件。此溫度感測器在 的操作範圍下，在經過校正後精確度可達 。而整個溫度對數位轉換系統的精確度，可在 以內，具有十二位元的解析度。

　　In this thesis, we research a sigma-delta analog-to-digital converter for bio-medical system application, using the thermal sensor to verify this system. The front end is 2-2 cascade sigma-delta modulator, integrating in TSMC 0.18um CMOS 1P6M technology. With the sampling frequency of 1MHz, signal bandwidth of 4kHz, and oversampling ratio of 128, it can achieve 84.14dB signal-to-noise ratio, and 13 bits resolution. Then, with regard to the specification of SDM, we design digital decimation filter in the back end, reducing the sampling frequency to twice signal bandwidth. We make use of verilog hardware description language to realize this digital filter, and download FPGA to verify the hardware. Therefore, we finish the sigma-delta ADC system.
　
　　Eventually, we utilize the thermal sensor to verify the ADC system. The CMOS vertical parasitic BJT is chosen to be the sensor. The accuracy of sensor is under the operation range of with calibration. The accuracy of the whole thermal to digital converter system can be within , with the resolution of 12 bits.

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