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研究生: 黃鈞平
Huang, Jiun-Ping
論文名稱: 降壓饋入式同步倍流整流半橋轉換器之研究
Study of Buck Fed Half-bridge Converter with Self-driven Synchronous Current-doubler Rectification
指導教授: 林瑞禮
Lin, Ray-Lee
梁從主
Liang, Tsrong-Juu
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2005
畢業學年度: 93
語文別: 中文
論文頁數: 69
中文關鍵詞: 同步整流半橋
外文關鍵詞: half-bridge, synchronous rectification
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  • 本論文主要為研究「降壓饋入式同步倍流整流半橋轉換器」,研製低電壓大電流電源轉換器,並探討此電路之特性與優缺點。本論文首先討論同步倍流整流器之動作原理,其次是分析對稱半橋轉換器操作於責任週期50%之工作原理,並做穩態分析與怠滯時間分析。最後實作一部「降壓饋入式同步倍流整流半橋轉換器」,轉換器之輸入電壓為36~ 72V,輸出為1.5V/70A,當輸入電壓為48V時,滿載效率為79.1%;當輸出電流為20A時,轉換器之效率可達88.7%。

    Buck fed half-bridge topology is very suitable for low voltage and high current applications. The analysis of synchronous current-doubler rectification is studied in this thesis. Also, the operating principle and characteristics of symmetrical half-bridge converter with 50% duty is discussed. The ZVS condition of buck fed half-bridge converter is investigated in detail. Finally, a buck fed half-bridge converter with 36~72VDC input voltage range and 1.5V/70A output is performed. The experimental results show that the efficiency of the proposed is 79.1% at the full-load condition and the maximum efficiency is 88.7% at 20A output current.

    摘要.......................Ⅰ 致謝.......................Ⅲ 目錄.......................Ⅳ 圖目錄......................Ⅵ 表目錄......................Ⅸ 第一章 緒論 1.1 研究背景與目的...................1 1.2 論文架構簡介....................3 第二章 同步倍流整流器 2.1 簡介.......................4 2.2 倍流器之架構..................4 2.3 同步倍流整流器之驅動電路.............6 第三章 半橋式轉換器 3.1 前言........................10 3.2 變壓器中間抽頭對稱半橋架構............11 3.3 變壓器中間抽頭非對稱半橋架構............12 3.4 同步倍流整流對稱半橋架構.............13 3.5 同步倍流整流非對稱半橋架構............15 3.6降壓饋入式同步倍流整流半橋架構.........16 第四章 降壓饋入式同步倍流整流半橋架構之電路分析 4.1穩態分析....................19 4.2怠滯時間分析...................30 4.3責任週期損失...................46 第五章 電路實作與實驗結果 5.1電路元件參數設計................50 5.2自激式同步倍流整流器驅動電路設計........55 5.3實驗結果....................57 第六章 結論 6.1結論.......................66 6.2未來展望.....................66 參考文獻

    [1]C. Y. Chang, S. M. Sze, ULSI Device, John Wiley & Sons, 2000.
    [2]F. C. Lee, P. Barbosa, P. Xu, J. Zhang, B. Yang and F. Canales, “Topologies and design considerations for distributed system applications” Proceeding of the IEEE, vol. 89, NO.6, June 2001.
    [3]M. Jinno, “Efficiency improvement for SR forward converters with LC snubber” IEEE Trans. on Power Electronics, vol.16, NO.6, November 2001.
    [4]G. Stojcic and C. Nguyen, “MOSFET synchronous rectifiers for isolated board-mounted DC-DC converters” IEEE INTELEC’ 2000, pp. 258-266.
    [5]L. Balogh, “The performance of the current doubler rectifier with synchronous rectification” HFPC’ 1995, pp. 216-225.
    [6]P. Alou, P. Perez-Bedmar, J. A. Cobos, J. Uceda, and M. Rascon, “A high efficiency voltage regulator module with single winding self-driven synchronous rectification” IEEE PESC’ 2000, vol.3, pp. 1510-1515.
    [7]A. I. Pressman, “Switching Power Supply Design,” Second Edition, McGraw-Hill, 1998.
    [8]N. Mohan, T. M. Undeland, and W. P. Robbins, “Power Electronics: Converters, Applications and Design,” Second Edition, John Wiley & Sons, 1995.
    [9]M. Brown, “Power Supply Cookbook,” Second Edition, Butterworth- Heinemann, 2001.
    [10]S. S. Ang, “Power Switching Converters,” Marcel Dekker, Inc. 1995.
    [11]P. Alou, J. Oliver, J.A. Cobos, O. Garcia, and J. Uceda, “Buck+half bridge (d=50%) topology applied to very low voltage power converters” IEEE APEC’ 2001, vol.2, pp.715-721.
    [12]M. Takagi, K. Shimizu, and T. Zaitsu, “Ultra high efficiency of 95 percent for DC/DC converter - considering theoretical limitation of efficiency” IEEE APEC’ 2002, vol.2, pp. 735-741.
    [13]S. Abe, J. Yamamoto, T. Zaitsu, and T. Ninomiya, “Fast transient response of two-stage DC-DC converter with low-voltage/high-current output” 2003 IEEE International Symposium, vol.1, pp. 417-421.
    [14]X. Ruan, J. Wang, and Q. Chen, “Am improved current-doubler- rectifier ZVS PWM full-bridge converter” IEEE PESC’ 2001, pp.1749-1754.
    [15]R. Sevens, “Circuit reinvention in power electronics and identification of prior work” IEEE APEC’1997, pp. 3-9.
    [16]吳義利,「自激式同步倍流整流對稱半橋轉換器之研究」,國立成功大學電機工程研究所碩士論文,民國九十二年。
    [17]W. Chen, P. Xu, and F.C. Lee,” The optimization of asymmetric half bridge converter” IEEE APEC’ 2001, vol.2, pp. 703-707.
    [18]L. Balogh, “Design Review: 100W, 400 kHz, DC/DC Converter With Current Doulber Synchronous Rectification Achieve 92% Efficiency” Unitrode Power Supply Design Seminar 1997. A3.
    [19]J. Sun and V. Rajasekaran, “DCM analysis and modeling of half-bridge converters with current-doubler rectifier” IEEE PESC’ 2001, vol.1, pp. 384-389.
    [20]J. Sun, K. F. Webb, and V. Mehrotra, “Integrated Magnetics for Current- Doubler Rectifiers”, IEEE Trans. on Power Electronics, vol.19, Issue: 3, May 2004 pp. 582-590.
    [21]P. Yuri and M. J. Milan, “Design and performance evaluation of low voltage/high current DC/DC on Board Modules”, IEEE Trans. on Power Electronics, vol.16, no.1, January 2001, pp. 26-33.
    [22]P. Alou, J.A. Cobos, O. Garcia, R. Prieto, and J. Uceda, “A new driving scheme for synchronous rectifiers: single winding self-driven synchronous rectification”, IEEE Trans. on Power Electronics, vol.16, Issue:6, Nov. 2001, pp.803-811.
    [23]R. Chen, J. T. Strydom, and J. D. Van Wyk, “Design of planar integrated passive module for zero-voltage switched asymmetrical half bridge PWM converter”, IEEE IAC, 2001, vol.4, pp. 2232- 2237.
    [24]吳健銘,「降壓同步倍流整流半橋轉換器之研究」,國立成功大學電機工程研究所碩士論文,民國九十三年。

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