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研究生： 吳柏興
Wu, Po-Hsing
論文名稱： 應用於高效率射頻極坐標發射器之封包追蹤放大器
CMOS Envelope Tracking Amplifier IC Design for High-Efficiency RF Polar Transmitters
指導教授： 梁從主
Liang, Tsorng-Juu
共同指導教授: 李宇君
Lie, Y.C. Donald
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2011
畢業學年度： 99
語文別： 英文
論文頁數： 84
中文關鍵詞： 封包追蹤放大器 、功率放大器 、極坐標發射器 、高效率
外文關鍵詞： Envelope tracking amplifier, Power amplifier, Polar transmitter, High efficiency
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    • 本文提出一應用於WiMAX系統且提升功率放大器效能之低功耗CMOS封包
    追蹤放大器。此文提出不同設計之封包追蹤放大器，並針對不同設計電路中不同的功率消耗及頻寬加以討論。 本文最後會針對不同設計封包放大器電路對於整個極坐標發射器系統之效能影響加以呈現及討論。 此論文採用TSMC 0.35umSiGe BiCMOS 製程實現，此積體電路面積為 1x1.4 mm2。在整合射頻/類比/數位系統模擬中，顯示採用封包追蹤技術之極坐標發射器效能，在輸入為擁有~10dB 高峰值對均值功率比(Peak-to-Average-Power Ratio, PAR) 之10MHzWiMAX 64QAM訊號且功率放大器輸出功率為19dBm 情況下， 擁有30%Power-Added-Efficiency (PAE)以及 4.6% 誤差向量幅度(Error Vector Magnitude,EVM)，其輸出並可以通過嚴格的輸出頻譜屏蔽，由實際量測的結果可得此封包放大器之效率為67~78%，和模擬數據相符。

    A low-power monolithic polar transmitter (TX) subsystem that includes a CMOS Envelope Tracking (ET) amplifier and a RF SiGe BiCMOS power amplifier (PA) for mobile WiMAX applications is presented. Several versions of the ET amplifiers are designed and their power consumption and bandwidth considerations are discussed　which are the major focus of this thesis on IC design as the ET amplifiers work well with the SiGe PA and the polar TX system previously designed and reported by Dr. Lie’s group. Consequently, the entire polar TX system performance and design trade-offs are presented and compared against different ET amplifiers designs. The entire IC occupies a total area of 1x1.4 mm2 and is fabricated in a TSMC 0.35um SiGe BiCMOS process. RF/Analog/Digital system co-simulation indicates that the overall ET-based polar TX system exhibits 30% Power-Added-Efficiency (PAE) and 4.6% Error Vector Magnitude (EVM) at 19dBm PA output power, which passes the stringent output spectral mask for a 10 MHz mobile WiMAX 64QAM signal with ~10dB Peak-to-Average-Power Ratio (PAR).

    Abstract i Acknowledgements iii List of Tables vi List of Figures vii Chapter 1. Introductions 1 1.1 Background 1 1.2 Motivation 2 1.2.1 Trade-off between PA’s efficiency and linearity 2 1.2.2 Efficiency improvement techniques 6 1.3 Organization 8 2. Fundamentals of switching regulators ...9 2.1 Introduction to switching regulators 9 2.1.1 Buck converter 9 2.1.2 Boost converter 11 2.1.3 Buck-Boost converter 13 2.2 Curret-mode vs. voltage-mode 14 2.2.1 Voltage-mode control 15 2.2.2 Current-mode 17 2.2.3 Comparisons of voltage-mode control and current-mode control 18 2.3 Synchronous rectifier technique 21 3. Fundamentals of envelope tracking technique 24 3.1 Envelope tracking technique 24 3.1.1 Conventional envelope tracking 24 3.1.2 A switch-mode envelope amplifier assisted by a linear-mode amplifier 26 3.1.3 A hybrid envelope amplifier using feedforward control 27 3.2 Operation principles of high efficiency and high linearity VDD ¬amp applied in this thesis 28 3.2.1 Operation mode #1 29 3.2.2 Operation mode #2 34 3.2.3 Operation mode #3 36 4. CMOS circuit design 37 4.1 Architecture of CMOS envelope tracking (ET) amplifier IC 37 4.2 Bias circuit 38 4.2.1 Wide-swing cascode current mirror 39 4.2.2 Constant transconductance bias circuit 43 4.2.3 Constant transconductance wide-swing bias circuit 45 4.3 Hysteresis comparator 46 4.3.1 Principles of hysteresis window 48 4.3.2 Design strategies for solving the speed issue 50 4.3.3 Design strategies for solving the hysteresis window variation issue 53 4.4 Anti-shoot-through buffer stage 56 4.5 Two OPAMP designs with different bandwidths for the ET amplifier 58 4.5.1 Class AB output stage 59 4.5.2 Gain boosting stage 64 4.5.3 Folded cascode gain stage 66 4.5.4 AC analysis 67 4.5.5 Design strategies for increasing dynamic supply voltage range 68 5. System simulation results 70 6. Layout and measurement results 75 6.1 Layout 75 6.2 Measurement results 77 7. Conclusions and future works 80 7.1 Conclusions 80 7.2 Future works 80 References 82

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