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研究生： 劉冠群
Liu, Kuan-Chun
論文名稱： 整合降昇壓與返馳式轉換電路之功因修正器
A Power Factor Corrector with Integrated Buck-Boost and Flyback Conversion Circuit
指導教授： 楊宏澤
Yang, Hong-Tzer
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2016
畢業學年度： 104
語文別： 英文
論文頁數： 78
中文關鍵詞： 交/直流轉換器 、非連續導通模式 、功率因數修正 、單級式 、直接功率傳送 、再生型緩震電路
外文關鍵詞： ac/dc Converter, Discontinuous Conduction Mode (DCM), Power Factor Correction (PFC), Single-Stage, Direct Power Transfer (DPT), Regenerative Snubber
相關次數： 點閱：106  下載：3 
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    • 本論文提出一新型單級式轉換器，在架構上結合一升降壓型功因修正電路與一返馳式直/直流轉換電路。藉由一組變壓器取代前級電流修正電感，部分輸入功率可直接傳送到輸出，而非先儲存在直流匯流排，不僅可降低直流匯流排電壓，亦可避免功率損失，進而提升轉換器效率。另一方面，使用返馳式直/直流轉換電路雖可達到電器隔離的功用，但儲存於變壓器之漏感能量會對功率開關元件造成電壓突波，可能造成元件損壞。因此，本論文亦於電路中整合一再生型緩震電路，不僅可回收漏感能量，亦可抑制因變壓器漏感造成開關電壓突波的問題。
    本論文詳述轉換器操作原理、穩態分析與參數設計，並實際製作一額定功率100W，輸入電壓85 Vrms 到265 Vrms，輸出電壓48 V 的雛型電路。根據實驗結果證實，本文所提之轉換器架構可有效抑制功率開關之電壓突波並具有低直流匯流排電壓。此外，亦可得接近於1之功率因數，轉換器最高效率可達92.2%。

    The thesis proposes a new single-stage converter by integrating a buck-boost converter for power factor correction (PFC) with a flyback dc/dc converter. By replacing the current-shaping inductor of a PFC semi-stage with a transformer, part of the input power is transferred to the output side directly instead of being stored in the dc bus capacitor first. This technique reduces dc bus voltage, prevents power dissipation, and enhances conversion efficiency. Although electrical isolation can be achieved by using a flyback dc/dc converter, the leakage inductance energy of the transformer causes voltage spikes in power devices. Hence, a regenerative snubber, which can not only recycle the leakage inductance energy, but also suppress the voltage spike problem, is proposed in the thesis.
    The operational principles, steady-state analysis, and design guidelines of the proposed converter are presented in this thesis. The features of the proposed converter have been verified by implementing a 100 W prototype circuit. The line input voltage is ranged from 85 Vrms to 265 Vrms and with a dc output voltage of 48 V. The experimental results show the voltage spike on the power switch can be suppressed effectively and a low dc bus voltage can be achieved. Moreover, close-to-unity power factors can be obtained with a maximal circuit efficiency of 92.2%.

    摘要 I ABSTRACT II 誌謝 III CONTENTS IV LIST OF TABLES VII LIST OT FIGURES VIII CHAPTER 1.INTRODUCTION 1 1.1 Background and Motivation 1 1.2 Literature Review 3 1.3 Research Objectives and Method 5 1.4 Organization 6 CHAPTER 2. REVIEW OF SINGLE-STAGE PFC CONVERTERS 7 2.1 Introduction 7 2.2 Existing Related Single-Stage PFC Converters 7 2.3 Single-Stage PFC Converters with Reduced DC Bus Voltage 9 2.4 Single-stage PFC Converters with Energy Recycling 12 2.5 Summary 14 CHAPTER 3. THE PROPOSED SINGLE-STAGE PFC CONVERTER 15 3.1 Introduction 15 3.2 The Circuit Configuration 15 3.3 Operating Principles 16 3.4 Steady-State Analysis and Design 27 3.4.1 Design Guidelines of the Major Parameters 27 3.4.2 Power Transfer Ratio, PT1/PT2 33 3.4.3 Regenerative Snubber Design 34 3.4.4 Analysis of the DC Bus Voltage with Leakage Inductance 36 3.4.5 Input LC Low-Pass Filter Design 38 3.4.6 Voltage and Current Stress Expression 39 3.5 Summary 40 CHAPTER 4. SIMULATED AND EXPERIMENTAL RESULTS 41 4.1 Specification of the Proposed Converter 41 4.2 Control and Peripheral Circuits of the Proposed Converter 43 4.2.1 Output Voltage Feedback Control 44 4.2.2 Voltage Feedback Circuit 45 4.2.3 Switch Driver Circuit 46 4.3 Simulation and Experimental Results 47 4.3.1 Input Voltage and Current 47 4.3.2 Voltage and Current of Power Switch 50 4.3.3 Voltage and Current of Diodes 53 4.3.4 The Voltage and Current of Snubber Capacitor 61 4.3.5 Voltages of dc bus and Output Capacitors 63 4.3.6 Power Factor of the Proposed Converter 66 4.3.7 Conversion Efficiency of the Proposed Converter 67 4.3.8 Comparisons with Existing Converters 69 4.4 Summary 72 CHAPTER 5. CONCLUSIONS AND FUTURE WORK 73 5.1 Conclusions 73 5.2 Future Work 74 REFERENCES 75

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