自從網際網路被發明以來，資料需求量可說是與日俱增，所以高速無線區域網路標準也不斷的被推出。從早期的IEEE 802.11、IEEE802.11b 及IEEE 802.11a 乃至於目前最新的無線區域網路標準IEEE802.11g，其最高傳輸速率可以達到54M bits/s。本篇論文將著重於設計一組符合 IEEE 802.11b標準的基頻傳送接收機制。
在本論文中，首先研究無線區域網路通道特性，並且考慮實際上硬體所遭遇如頻率偏移、相位誤差、取樣誤差等問題，最後建立一個近似真實無線通道的模型。從工作站 SPW 模擬的成果證明，所設計的同步機制，能在無線通道的模擬之下有不錯的性能曲線。
除了分析與模擬外，硬體實現是最後將致力的重點，為了考驗所設計的同步演算法在即時的通訊環境也能正常運作，採用德州儀器公司所生產的數位訊號處理器 TMS320C6711 配合周邊電路完成一對傳送接收之數據機。

Since internet was invented, the needs of the information gradually increase. Hence, the standard of the high-speed Wireless LAN is continuously performed. From the early IEEE 802.11 , IEEE 802.11b and IEEE 802.11a to the newest wireless LAN standard, IEEE 802.11g, the highest speed is up to 54M bits/s. This thesis focuses on the design of a baseband transceiver conforming with the IEEE 802.11b standard.
In this thesis, we investigate the channel characteristics of the Wireless LAN, and firstly concerned about the harmful effects such as, frequency offset, phase error, sampling error caused by the hardware. The model which is similar to the real wireless channel is build and simulated . rom the simulation results of SPW, the synchronization solutions one designs have superior performance on WLAN channel.
In addition to analysis and simulation, hardware implementation is the last emphasis. For testing the designed synchronization algorithm could well work at real time communication environment, one adopt the TI TMS320C6711 and some peripheral circuits to complete an embryo modem.

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