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研究生：	余國正 Yu, Gwo-Jeng
論文名稱：	低電壓平方根領域濾波器之設計與高階平方根領域濾波器之系統性合成 Design of Low-Voltage Square-Root Domain Filters and Systematic Synthesis of High-Order Filters
指導教授：	劉濱達 Liu, Bin-Da
學位類別：	博士 Doctor
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2005
畢業學年度：	93
語文別：	英文
論文頁數：	177
中文關鍵詞：	高階平方根領域濾波器、可延伸性. 、連續時間式濾波器、系統性合成、單一晶片系統、高頻率工作、平方根領域濾波器、電流模式平方根領域帶通濾波器、低電壓準位移位電流鏡、電子式可調、電流模式開根號電路
外文關鍵詞：	square-root domain filter, current-mode square-root domain band-pass filter, low-voltage level-shift current mirror, current-mode square-root circuit, electronically tunable, high frequency operation, continuous-time filter, system-on-a-chip, systematic synthesis, extensibility., high-order square-root domain filter
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　　平方根領域(SRD)濾波器係針對一個特別的轉移函數，藉助一非線性技術將其映射至一狀態空間描述的狀態變數，並將該狀態方程式藉接地電容器進一步轉換成節點方程式。接著，再利用MOSFET的平方定律關係，將節點方程式變成中間變量。其中該節點方程式代表了一階及二階電流模式的SRD濾波器，可由電流鏡、電流模式平方根電路、及電容器所組成。因此，透過部分子電路的相互聯接來完成節點方程式的硬體實現方式，即可組成電流模式的SRD濾波器。
　　本文透過低電壓準位移動的技術及TSMC 0.25 m 1p5m CMOS製程技術設計出操作於1.5 V電源電壓下之SRD帶通濾波器，並對幾個SRD濾波器進行模擬，結果顯示模擬與測試的結果極為吻合，更證實中心頻率f0 不僅可達到百萬赫茲的範圍，同時也可用電子方式調整。因此，具有操作頻寬大、可調整、操作電壓低、功率消耗小等優點。
　　基於工作於飽和區之MOSFET的二次方I-V的關係式，本文也提出一套高階低電壓平方根領域濾波器的系統性合成技術。其中對於輸入信號、狀態空間變量的直流電壓、以及直流偏壓電流I0 的直流成分都有明確的設定。所提出的平方根領域濾波器之原型也能克服介於輸入與輸出節點之間的在直流水準之不相等，以改善實現高階濾波器電路時的可靠性。透過可接受範圍內調整直流偏壓電流I0 的值，不但所提出的平方根領域高階濾波器之原型電路之中心頻率f0 (或3分貝頻率f3dB)可以達到百萬赫茲的範圍，而且也利用電子方式予以調整。以1.5 V電源電壓及TSMC 0.25 m 1p5m CMOS製程之條件進行模擬結果，得到之平均誤差小於1.0%，證實了所提出的合成技術的準確性。

　　Square-root domain (SRD) filters feature a nonlinear mapping on the state variables of a state-space description for a particular transfer function. In order to realize the SRD filters, state equations must be further transformed to nodal equations at the nodes of grounded capacitors. Furthermore, based on the MOSFET square law relationship, the nodal equations are altered to intermediate variables, where the nodal equations demonstrate that the circuits of first-order and second-order current-mode SRD filters basically comprise current mirrors, current-mode square-root circuits, and capacitors. Then, by means of interconnection of sub-circuits to realize the terms of nodal equations, the circuit diagrams of current-mode SRD filters are accomplished.
　　Simultaneously, by adopting the technology of low-voltage level-shift and utilizing TSMC 0.25 m 1p5m CMOS technology operated with 1.5 V power supply voltage, an experiment of SRD band-pass filter and several simulated results of SRD filters are proposed. Both of the simulated and measured results agree with each other accordingly, and have shown that the center frequency f0 is not only attainable at megahertz frequencies but also tunable electronically. The proposed circuits, thus, have the advantages of high frequency operation, tuneability, low supply voltage operation, low power consumption, and low noise. Obviously a low voltage continuous-time filter implemented by the conventional digital CMOS technology is proved to be suitable for system-on-a-chip application.
　　A systematic synthesis for high-order SRD based on the quadratic I-V relationship for an MOSFET operated in saturation region is also presented. Emphases are placed on the methodology of filter synthesis, the constructive settings of DC components for input signals, the DC voltages of the state-space variables, and the DC bias current I0. The proposed prototypes of square-root domain filters are able to overcome the possible inequality between the input and output node of DC level, in which improve the reliability of high-order filter implementation. Furthermore, by means of adjusting the range of the DC bias current I0 in the acceptable boundary, the center frequency f0 or 3 dB frequency f3dB of the proposed prototypical circuits of SRD filters is not only attainable at megahertz frequencies but also tunable electronically. Simulations are performed with the model of a 0.25 m CMOS process at 1.5 V supply voltage. The simulated results, which provide that the average errors of frequency response are smaller than 1.0%, demonstrate the validity of the proposed synthetic technique. The synthesized filters have the features of high frequency operation, tuneability, extensibility, and low power consumption.

TABLE CAPTIONS	III

FIGURE CAPTIONS	V

CHAPTER 1  INTRODUCTION	1
1.1  Research Motivation 	1
1.2  Organization of the Dissertation 	3

CHAPTER 2  DESIGN METHODOLOGY OF SQUARE-ROOT DOMAIN FILTERS	5
2.1  State-Space Approach of Square-Root Domain Filters 	6
2.1.1  Transformation of the Transfer Function for First-Order Filter 	6
2.1 2  Transformation of the Transfer Function for Second-Order Filter 	9
2.2  The Design Procedures of Square-Root Domain Filters 	17
2.3  Design of Square-Root Domain Filters 	19
2.3.1  Second-Order Square-Root Domain Band-Pass Filter 	19
2.3.2  First-Order Square-Root Domain Low-Pass Filter 	23
2.3.3  Second-Order Square-Root Domain Low-Pass Filter 	24
2.3.4  Second-Order Square-Root Domain Biquad Filter 	25

CHAPTER 3  CIRCUIT REALIZATION OF CURRENT-MODE SQUARE-ROOT DOMAIN FILTERS	29
3.1  Current-Mode Square-Root Circuit 	31
3.2  Circuit Realization of Current-Mode Square-Root Domain Filters 	33
3.2.1  Second-Order Square-Root Domain Band-Pass Filter 	33
3.2.2  First-Order Square-Root Domain Low-Pass Filter 	34
3.2.3  Second-Order Square-Root Domain Low-Pass Filter 	34
3.2.4  Second-Order Square-Root Domain Biquad Filter 	35
3.3  Low-Voltage Current-Mode Square-Root Circuit 	36
3.4  Circuit Realization of Low-Voltage Current-Mode Square-Root Domain Filter	45
3.4.1  Second-Order LV SRD Band-Pass Filter 	45
3.4.2  First-Order LV SRD Low-Pass Filter 	45
3.4.3  Second-Order LV SRD Low-Pass Filter 	47
3.4.4  Second-Order LV SRD Biquad Filter 	47

CHAPTER 4  SIMULATION AND MEASUREMENT RESULTS	49
4.1  Current-Mode Square-Root Circuit 	51
4.2  Circuit Realization of Current-mode Square-Root Domain Filters 	54
4.2.1  Second-Order Square-Root Domain Band-Pass Filter 	55
4.2.2  First-Order Square-Root Domain Low-Pass Filter 	60
4.2.3  Second-Order Square-Root Domain Low-Pass Filter 	61
4.2.4  Second-Order Square-Root Domain Biquad Filter 	62
4.3  Low-Voltage Current-Mode Square-Root Circuit 	70
4.4  Circuit Realization of Low-Voltage Current-Mode Square-Root Domain Filter	77
4.4.1  Second-Order LV SRD Band-Pass Filter 	78
4.4.2  First-Order LV SRD Low-Pass Filter 	84
4.4.3  Second-Order LV SRD Low-Pass Filter 	87
4.4.4  Second-Order LV SRD Biquad Filter 	91
4.5  Summaries of Simulated Results for Current-Mode Square-Root Domain Filters 	98

CAHPTER 5  SYNTHESIS OF HIGH-ORDER SQUARE-ROOT DOMAIN FILTERS	101
5.1  Transformation of High-Order Filter 	102
5.2  Synthesis of Current-mode Square-Root Domain Filters 	104
5.2.1  Synthesis of Third-Order SRD Low-Pass Filter 	105
5.2.1.1  One Stage of Second-Order SRD LPF Cascaded One Stage of First-Order SRD LPF 	106
5.2.1.2  One Stage of Second-Order Low-Pass Section of SRD Biquad Cascaded One Stage of First-Order SRD LPF 	111
5.2.2  Synthesis of Eighth-Order SRD Band-Pass Filter 	115
5.2.2.1  Four Stages of Second-Order SRD BPF Cascaded 	116
5.2.2.2  Four Stages of Second-Order Band-Pass Section of SRD Biquad Cascaded 	119
5.3  Synthesis of Low-Voltage Current-Mode Square-Root Domain Filters 	122
5.3.1  Synthesis of Third-Order LV SRD Low-Pass Filter 	123
5.3.2  Synthesis of Eighth-Order LV SRD Band-Pass Filter 	128
5.3.3  Synthesis of Ninth-Order LV SRD Band-Pass Filter 	132
5.3.3.1  Four Stages of Second-Order LV LPF Cascaded One Stage of First-Order LV SRD LPF 	132
5.3.3.2  Four Stages of Second-Order LV Low-Pass Section of SRD Biquad Cascaded One Stage of First-Order LV SRD LPF 	136

CHAPTER 6  CONCLUSIONS AND FUTURE WORKS	139
6.1  Conclusions 	139
6.2  Future Works 	141

REFERENCES	143
BIOGRAPHY	151
PUBLICATION LISTS	153
 
Table Captions

Table 3.1  Characteristics of various techniques for CMOS design 	37
Table 4.1  The aspect ratios of transistors for Figs 3.1 to 3.5 	55
Table 4.2  Summary of the simulated and measured results for the band-pass filter 	59
Table 4.3  Summary of the simulated results for the biquad filter 	68
Table 4.4  Summary of the measured results for the biquad filter 	69
Table 4.5  The aspect ratios of transistors for Figs 3.8 to 3.14 	78
Table 4.6  Summaries of the simulated and measured results for the proposed Second-order LV SRD BPF 	82
Table 4.7  Comparison of the measured results between the proposed LV SRD BPF and the BPF by [12] 	83
Table 4.8  Comparison of the measured results between the proposed LV SRD BPF and the LPFs by [29, 30] 	83
Table 4.9  Summary of the simulated results for the proposed first-order LV SRD LPF 	87
Table 4.10  Summary of the simulated results for the proposed second-order LV SRD LPF  	91
Table 4.11  Summary of the simulated results for the proposed Second-order LV SRD biquad filter 	97
Table 4.12  Summary of the aspect ratios of transistors for the current-mode current mirrors and square-root circuit shown in Fig 3.1 	99
Table 4.13  Summary of the relationships between C, Q, W/L, I0, and f0 (or f3 dB) for the current-mode SRD filters shown in Figs 3.2 to 3.5 operated in VDD = 2.5 V 	99
Table 4.14  Summary of the aspect ratios of transistors for the LV current-mode level-shifter CMs and square-root circuit shown in Figs 3.8 to 3.10 	100
Table 4.15  Summary of the relationships between C, Q, W/L, I0, and  f0 (or f3 dB) of the LV current-mode SRD filters shown in Figs 3.11 to 3.14 operated in VDD = 1.5 V 	100
Table 5.1  The aspect ratios of transistors for the current-mode current mirrors and square-root circuit shown in Fig 3.1 	104
Table 5.2  The acceptable boundaries of C, W/L, and I0 of the current-mode SRD filters shown in Figs 3.2 to 3.5 operated in VDD = 2.5 V 	105
Table 5.3  Specifications of a third-order SRD LPF 	106
Table 5.4  The acceptable boundaries of C, W/L, and I0 of second-order SRD LPF and first-order SRD LPF 	107
Table 5.5  Summary of the synthetic results for the specified third-order SRD low-pass filter 	110
Table 5.6  The acceptable boundaries of C, W/L, and I0 of second-order low-pass section of SRD biquad and first-order SRD LPF 	111
Table 5.7  Summary of the synthetic results for the specified third-order SRD low-pass filter 	114
Table 5.8  Specifications of an eighth-order SRD BPF 	115
Table 5.9  The acceptable boundaries of C, W/L, and I0 of second-order SRD BPF 	116
Table 5.10  Summary of the synthetic results for the specified eighth-order SRD band-pass filter 	118
Table 5.11  The acceptable boundaries of C, W/L, and I0 of second-order band-pass section of SRD biquad 	119
Table 5.12  Summary of the synthetic results for the specified eighth-order SRD band-pass filter 	121
Table 5.13  The aspect ratios of transistors for the LV current-mode level-shifter CMs and square-root circuit shown in Figs 3.8 to 3.10 	122
Table 5.14  The acceptable boundaries of C, W/L, and I0 of the LV current-mode SRD filters shown in Figs 3.11 to 3.14 operated in VDD = 1.5 V 	123
Table 5.15  Specifications of a third-order LV SRD LPF 	124
Table 5.16  The acceptable boundaries of C, W/L, and I0 of second-order LV SRD LPF and first-order LV SRD LPF 	125
Table 5.17  Summary of the synthetic results for the specified third-order LV SRD LPF ….	127
Table 5.18  Specifications of an eighth-order LV SRD BPF. 	128
Table 5.19  The acceptable boundaries of C, W/L, and I0 of second-order LV SRD BPF ………………………………………………………………………	…129
Table 5.20  Summary of the synthetic results for the specified eighth-order LV SRD BPF ...	131
Table 5.21  Specifications of a ninth-order LV SRD LPF 	132
Table 5.22  The acceptable boundaries of C, W/L, and I0 of the second-order LV SRD LPF and first-order LV SRD LPF 	133
Table 5.23  Summary of the synthetic results for the specified ninth-order LV SRD LPF …	135
Table 5.24  The acceptable boundaries of C, W/L, and I0 of the second-order LV low-pass section of SRD biquad and first-order LV SRD LPF 	136
Table 5.25  Summary of the synthetic results for the specified ninth-order LV SRD LPF …….	138


 
Figure Captions

Fig. 2.1  The design procedures of square-root domain filters	18
Fig. 3.1.  (a) The circuit diagram of the current-mode square-root circuit [12], (b) Block diagram of the current-mode square-root circuit with the transistor aspect ratios 1:(1/Q) in the output stage 	31
Fig. 3.2.  The circuit diagram of the second-order current-mode square-root domain band-pass filter 	33
Fig. 3.3.  The circuit diagram of the first-order current-mode square-root domain low-pass filter 	34
Fig. 3.4.  The circuit diagram of the second-order current-mode square-root domain low-pass filter 	35
Fig. 3.5.  The circuit diagram of the second-order current-mode square-root domain biquad filter 	35
Fig. 3.6  Low-voltage level-shifter current mirrors [27] 	38
Fig. 3.7  Modified low-voltage level-shifter current mirror [35] 	38
Fig. 3.8  The proposed low-voltage level-shifter current mirrors. (a) Symbol and circuit diagram of the n-type low-voltage level-shifter current mirror, (b) Symbol and circuit diagram of the p-type low-voltage level-shifter current mirror 	40
Fig. 3.9.  DC biasing circuit diagram of (a) n-type and (b) p-type low-voltage level-shifter current mirrors 	41
Fig. 3.10.  (a) Symbol of the current-mode square-root circuit, (b) Circuit diagram of the current-mode square-root circuit 	43
Fig. 3.11.  The circuit diagram of the second-order square-root domain band-pass filter 	46
Fig. 3.12.  The circuit diagram of the first-order square-root domain low pass filter 	46
Fig. 3.13.  The circuit diagram of the second-order square-root domain low pass filter 	47
Fig. 3.14.  The circuit diagram of the second-order square-root domain biquad filter 	48
Fig. 4.1.  Simulated results of the current-mode square-root circuit where VDD = 2.5 V,   and   are a 200 A DC current and a triangle wave current with values between 1 and 200 A, respectively. (a) Input currents, (b) Ideal and simulated output currents 	52
Fig. 4.2.  (a) Simulated AC response structure. (b) Frequency response of the current-mode square-root circuit 	53
Fig. 4.3.  The microphotograph of the second-order square-root domain band-pass and biquad filters 	54
Fig. 4.4.  Frequency responses of the band-pass filter with VDD = 2.5 V, C1 = C2 = 0.9 pF, Q = 1, while I0 is changed from 80 to 200 A. (a) Simulated results, (b) Measured results 	57
Fig. 4.5.  The third order intermodulation distortion of the band-pass filter. (a) Simulated results, (b) Measured results 	58
Fig. 4.6.  Simulated frequency responses of the first-order low-pass filter with VDD = 2.5 V, C1 = C2 = 0.9 pF, Q = 1, while I0 is changed from 5 to 40 A 	60
Fig. 4.7.  Simulated frequency responses of the second-order low-pass filter with VDD = 2.5 V, C1 = C2 = 0.9 pF, Q = 1, while I0 is changed from 5 to 40 A 	61
Fig. 4.8.  Simulated frequency responses of the biquad for I0 changing from 20 to 100 A while VDD = 2.5 V, C1 = C2 = 0.9 pF, Q = 0.85. (a) Band-pass section. (b) Low-pass section 	63
Fig. 4.9.  Measured frequency responses of the biquad. (a) Band-pass section. (b) Low-pass section 	64
Fig. 4.10.  The simulated third order intermodulation distortion of the biquad. (a) Band-pass section. (b) Low-pass section 	66
Fig. 4.11.  The measuremed third order intermodulation distortion of the biquad.       (a) Band-pass section. (b) Low-pass section 	67
Fig. 4.12  (a) The proposed n-type low-voltage level-shifter current mirror (shown in Fig. 3.8(a)), (b) The conventional current mirror 	70
Fig. 4.13.  Comparisons of the proposed n-type LV level-shifter CM and the conventional CM. (a) The error of simulated current gain ((Iout - Iin) / Iin) vs. supply input voltage VDD, (b) The error of simulated current gain ((Iout - Iin) / Iin) vs. input current Iin 	71
Fig. 4.14.  Simulated results of the current-mode square-root circuit with VDD = 1.5 V,   and   are a 100 A DC current and a triangle wave current with amplitude 100 A, respectively. (a) Input currents, (b) Ideal and simulated output currents ..	73
Fig. 4.15.  (a) Simulated AC response structure. (b) Frequency response of the proposed LV current-mode square-root circuit 	74
Fig. 4.16.  Simulated results of the proposed LV current-mode square-root circuit. (a) Input currents, (b) Ideal and simulated output currents 	75
Fig. 4.17.  Simulated results of the exponent function for the proposed LV current-mode square-root circuit 	76
Fig. 4.18.  The microphotograph of the proposed second-order LV SRD BPF 	77
Fig. 4.19.  Frequency responses of the second-order LV SRD BPF with VDD = 1.5 V, VN1 = 0.52 V, VN2 = 1.02 V, VP1 = 0.95 V, VP2 = 0.46 V, C1 = C2 = 0.9 pF, Q = 21.3, while I0 is changed from 60 to 200 A. (a) Simulated results, (b) Measured results 	80
Fig. 4.20.  The third order intermodulation distortion of the second-order LV SRD BPF. (a) Simulated results, (b) Measured results 	81
Fig. 4.21.  The simulated frequency responses of the proposed first-order LV SRD LPF for I0 changing from 2 to 40 A while VDD = 1.5 V, C = 1 pF, Q = 1 	84
Fig. 4.22.  The simulated output FFT transform and THD of the proposed first-order LV SRD LPF for a 1 MHz input sinusoidal wave with signal amplitude of 50 mV …..	85
Fig. 4.23.  The simulated third order intermodulation distortion of the proposed first-order LV SRD LPF with two in-band input signals 4 MHz and 5 MHz and signal amplitude of 50 mV 	85
Fig. 4.24.  The simulated spurious free dynamic range of the proposed first-order LV SRD LPF 	86
Fig. 4.25.  The simulated frequency responses of the proposed second-order LV SRD LPF for I0 changing from 2 to 40 A while VDD = 1.5 V, C = 1 pF, Q = 1 	88
Fig. 4.26.  The simulated output FFT transform and THD of the proposed second-order LV SRD LPF for a 1 MHz input sinusoidal wave with signal amplitude of 50 mV 	89
Fig. 4.27.  The simulated third order intermodulation distortion of the proposed second-order LV SRD LPF with two in-band input signals 5 MHz and 6 MHz and signal amplitude of 50 mV 	89
Fig. 4.28.  The simulated spurious free dynamic range of the proposed second-order LV SRD LPF 	90
Fig. 4.29.  The simulated frequency responses of the proposed second-order LV SRD biquad filter for I0 changing from 2 to 40 A while VDD = 1.5 V, C = 1 pF, Q = 1. (a) Band-pass section. (b) Low-pass section 	93
Fig. 4.30.  The simulated output FFT transform and THD of the proposed second-order LV SRD biquad filter for a 1 MHz input sinusoidal wave with signal amplitude of 50 mV. (a) Band-pass section. (b) Low-pass section 	94
Fig. 4.31.  The simulated third order intermodulation distortion of the proposed second-order LV SRD biquad filter. (a) Band-pass section with two in-band input signals 10 MHz and 11 MHz and signal amplitude of 50 mV. (b) Low-pass section with two in-band input signals 5 MHz and 6 MHz and signal amplitude of 50 mV 	95
Fig. 4.32.  The simulated spurious free dynamic range of the proposed second-order LV SRD biquad filter . (a) Band-pass section. (b) Low-pass section 	96
Fig. 5.1  The synthetic procedures of a specified high-order SRD filter 	103
Fig. 5.2  Synthetic methods of the specified third-order SRD low-pass filter 	106
Fig. 5.3  The frequency response of the third-order SRD low-pass filter 	109
Fig. 5.4  The frequency response of the third-order SRD low-pass filter 	113
Fig. 5.5  Synthetic methods of the specified eighth-order SRD band-pass filter 	115
Fig. 5.6  The frequency response of the eighth-order SRD band-pass filter 	117
Fig. 5.7  The frequency response of the eighth-order SRD band-pass filter 	120
Fig. 5.8  Synthetic methods of the specified third-order LV SRD low-pass filter 	124
Fig. 5.9  The frequency response of the third-order LV SRD low-pass filter 	126
Fig. 5.10  The frequency response of the eighth-order LV SRD BPF 	130
Fig. 5.11  The frequency response of the ninth-order LV SRD low-pass filter 	134
Fig. 5.12  The frequency response of the ninth-order LV SRD low-pass filter 	137


                                    

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