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研究生：	邱詣智 Qiu, Yi-Zhi
論文名稱：	具低電磁干擾輸出級0.35mA靜態電流0.00075% THD+N之D類放大器 A 0.35mA-Quiescent-Current 0.00075%-THD+N Class-D Amplifier with Low-EMI Power Stage
指導教授：	郭泰豪 Kuo, Tai-Haur
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2020
畢業學年度：	108
語文別：	英文
論文頁數：	107
中文關鍵詞：	混疊失真、音頻放大器、D類放大器、電磁干擾、頻率等化、脈寬調變、總諧波失真加雜訊、靜態電流
外文關鍵詞：	Aliasing distortion, audio amplifier, Class-D amplifier, electromagnetic interference (EMI), frequency equalization, pulse-width modulation (PWM), total harmonic distortion plus noise (THD+N), quiescent current
相關次數：	點閱：98 下載：0
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本論文實現一個低電磁干擾、低靜態電流、低總諧波失真加雜訊之D類音頻放大器。本文詳細分析並最佳化具頻率等化之脈寬調變殘餘混疊失真抑制技術及CMFBD模式輸出級之輸出共模校正技術，此外，亦提出無窄波CMFBD調變技術。
具頻率等化之脈寬調變殘餘混疊失真抑制技術藉由低複雜度前饋式頻率等化來解決之前技術相位偏移的問題，使得放大器可以在低切換頻率下有效抑制脈寬調變殘餘混疊失真，而同時達到低失真、低靜態電流，論文中除了分析前作之相位偏移問題外，亦藉由分析、推導迴圈濾波器相關公式以最佳化失真抑制能力、靜態電流消耗、雜訊。而CMFBD輸出級之輸出共模校正技術則是降低該輸出級在製程變異之下所導致的共模高頻突波，以達到更低之共模電磁干擾。此外，所提出的無窄波CMFBD調變技術解決原CMFBD調變在低輸出功率所面臨窄波導致的高失真問題，此技術藉由低複雜的邏輯電路調整功率級控制信號以消除窄波，使得失真大幅降低。
本論文之D類音頻放大器晶片實現於0.18微米技術，驗證結果顯示在5伏特之電源電壓、8歐姆負載下可達到0.00075%之最低總諧波失真加雜訊且僅消耗0.35毫安培之靜態電流，與現有最佳文獻之D類音頻放大器相比可達最低之靜態電流消耗及最佳之品質因數3560，分別比現存最佳值改善15%及44%。此外，相較於傳統CMFBD功率級，輸出共模校正技術可額外抑制輸出共模在30MHz~1GHz頻帶內最大值達10dB。而在使用所提出之無窄波CMFBD調變時，低輸出功率之總諧波失真加雜訊及動態範圍皆可改善20dB。

In this thesis, a low-electromagnetic-interference (EMI), low-quiescent-current, low-total-harmonic-distortion-plus-noise (THD+N) Class-D is realized, and the frequency-equalized PWM-residual-aliasing reduction (FE-PRAR) technique as well as the common-mode output correction for common-mode-free BD (CMFBD) power stage are comprehensively analyzed and optimized; moreover, a narrow-pulse-free CMFBD modulation is proposed. The FE-PRAR technique utilizes a low-complexity feedforward frequency equalization path to compensate the phase shift in the prior art, permitting the amplifier to effectively suppress the PWM-residual-aliasing distortion without using high switching frequency (fSW), leading to both low distortion and low quiescent current consumption. In this thesis, the phase-shift issue in the prior art is analyzed in detail, and the loop filter design with FE-PRAR technique is optimized for better distortion suppression, lower quiescent current and lower noise. On the other hand, to lower the common-mode EMI, the common-mode output correction technique for CMFBD power stage reduces the common-mode output spikes resulted from process variation. The analysis and design of the common-mode output correction loop is also provided in the thesis. In addition, the proposed narrow-pulse-free (NPF) CMFBD modulation resolves the narrow-pulse problem at low output power in the conventional CMFBD modulation. The technique exploits simple logics to reshape the control signal of the power stage for the elimination of narrow pulses, leading to a greatly-suppressed THD+N.
Fabricated with the 0.18-μm process, this work with a supply of 5 V and a speaker load of 8 Ω achieves the minimal THD+N of 0.00075% while consuming a low quiescent current of 0.35 mA. Compared with state-of-the-art Class-D audio amplifiers, this work features the lowest quiescent current and the highest figure-of-merit of 3560, surpassing prior arts by 15% and 44%, respectively. In addition, the common-mode output correction technique further reduces the maximal magnitude of common-mode output spectrum within the range of 30 MHz to 1 GHz by 10 dB. Furthermore, with the proposed NPF-CMFBD modulation, both the THD+N at low output power and the dynamic range are improved by 20 dB.

Acknowledgment---------------------------------------------------------------------------VI
Table of Contents--------------------------------------------------------------------------VII
List of Tables-------------------------------------------------------------------------------	IX
List of Figures	-------------------------------------------------------------------------------X
Chapter 1.	Introduction-----------------------------------------------------------------1
1 Motivation--------------------------------------------------------------------------------1
2 Organization------------------------------------------------------------------------------4
Chapter 2.	Fundamentals of Class-D Amplifiers------------------------------------5
1 Block Diagram of Class-D Audio Amplifiers----------------------------------------5
2 Distortion Analysis of Class-D Audio Amplifiers-----------------------------------7
2.1 Open-Loop Distortions---------------------------------------------------------------8
2.2 PWM-Residual-Aliasing Distortion-----------------------------------------------12
2.3 Prior Arts of PWM-Residual-Aliasing Distortion Reduction------------------13
3 Electromagnetic Interference of Class-D Audio Amplifiers----------------------18
3.1 Background of Electromagnetic Interference (EMI) ---------------------------18
3.2 Prior Arts of EMI Suppression-----------------------------------------------------22
3.3 Common-Mode-Free BD (CMFBD) Modulation [11] -------------------------24
4 Issues of the Common-Mode-Free BD Modulation (CMFBD) -----------------26
4.1 PVT-Sensitive Operation------------------------------------------------------------27
4.2 Common-Mode Output Spikes-----------------------------------------------------29
4.3 Narrow Pulses at Low Output Power---------------------------------------------30
Chapter 3.	System Design------------------------------------------------------------32
1 Frequency-Equalized PWM-Residual-Aliasing Reduction----------------------32
1.1 Phase Shift Analysis of the Prior PWM-Residual-Aliasing Reduction------33
1.2 Analysis of Frequency Equalization Technique---------------------------------36
1.3 Optimized Design of FE-PRAR with Low-Complexity Realization---------38
1.4 Loop Filter Design for Minized Switching Frequency-------------------------41
1.5 Detailed Noise Analysis of Implemented FE-PRAR Loop Filter-------------47
2 Common-Mode Output Correction for CMFBD Power Stage	------------------51
2.1 Analysis of Common-Mode Output Spikes--------------------------------------53
2.2 Common-Mode Output Correction Technique [18] ----------------------------55
2.3 Analysis of VCM Correction Technique-----------------------------------------57
2.4 Design of VCM Correction Technique-------------------------------------------59
3 Narrow-Pulse-Free CMFBD Power Stage-----------------------------------------60
3.1 Prior Solutions of Narow-Pulse Issue--------------------------------------------60
3.2 The proposed Narrow-Pulse-Free CMFBD Modulation----------------------63
3.3 Realized Narrow-Pulse-Free CMFBD Modulation----------------------------64
3.4 Design and Verification of Narrow-Pulse-Free CMFBD Power Stage	-----67
Chapter 4.	Circuit Implementation-------------------------------------------------69
1 FE-PRAR Loop Filter----------------------------------------------------------------69
1.1 Low-Complexity Circuit Realization of FE-PRAR Technique---------------69
1.2 Operational Amplifier Design-----------------------------------------------------71
1.3 Comparator Design-----------------------------------------------------------------73
2 Low-EMI Reconfigurable BD/CMFBD Power Stage---------------------------74
2.1 BD-to-CMFBD Converter---------------------------------------------------------74
2.2 Power Stage Design----------------------------------------------------------------76
2.3 Snubber Design---------------------------------------------------------------------82
2.4 Common-Mode Output Correction----------------------------------------------84
3 Narrow-Pulse-Free CMFBD Modulation	-----------------------------------------86
3.1 Delay Cell Circuit---------------------------------------------------------86
3.2 Considerations of Circuit Implementation-----------------------------------87
Chapter 5.	Layout and Results-----------------------------------------------88
1 Layout details and considerations--------------------------------------------88
1.1 Layout considerations and parasitic models---------------------------------89
1.2 Latch-up problem-----------------------------------------------------------91
2 Simulation Result and Comparison Table---------------------------------------91
2.1 Verification of the FE-PRAR technique--------------------------------------92
2.2 Verification of the VCM correction technique-------------------------------94
2.3 Verification of the NPF-CMFBD technique------------------------------------94
2.4 Performance summary--------------------------------------------------------95
3 PCB Design Consideration-----------------------------------------------------96
4 Measurement Setup------------------------------------------------------------98
5 Measured Results-------------------------------------------------------------99
Chapter 6.	Conclusion and Future Work--------------------------------------103
1	Conclusion--------------------------------------------------------------103
2	Future Work-------------------------------------------------------------104
References----------------------------------------------------------------------105
                                    

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