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研究生: 賴雲正
Lai, Yun-Jeng
論文名稱: 應用現場可規劃邏輯閘陣列設計之碎形幾何技術於訊號擾動之偵測
Application of Fractal Geometry for the Disturbance Detection By Using Field Programmable Gate Array
指導教授: 黃世杰
Huang, Shyh-Jier
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2003
畢業學年度: 91
語文別: 中文
論文頁數: 93
中文關鍵詞: 現場可規劃邏輯閘陣列碎形幾何技術
外文關鍵詞: Field Programmable Gate Array, Fractal Geometry Technique
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  • 由於科技產業的蓬勃發展,使得數位或類比訊號處理裝置所需分析的資料量大幅增加。然受到儀器故障、設備元件特性等作用,電力訊號內含異常干擾成分的機率卻大幅升高。因異常干擾訊號所影響之層面相當廣泛,故為了增加分析的精確度,異常干擾訊號應予以辨識,以便採取預警措施,以掌握系統運轉的可靠度。
    本論文係應用現場可規劃邏輯閘陣列(Field-programmable gate array, FPGA)完成以箱形計數法為輔之碎形幾何技術之硬體實現。由於碎形幾何技術可將動態渾沌特性予以量化,因此文中係嵌入碎形維度計算於整個偵測過程,並藉由硬體描述語言將其實現於FPGA晶片,進而提昇干擾訊號之檢測能力。文中將所提偵測模式測試於電力系統波動之檢測,藉由模擬實測結果,證實該方法在訊號檢測上確具高可行性及實用價值。

    Because of the fast development of high-tech industry, the amount of data generated either from digital device or analog devices has been increased significantly. Particularly, the data to be analyzed are often affected by the characteristics of faulted equipment or elements. In other words, the unexpected disturbances may largely downgrade the accuracy of the data analysis. Hence, an effective approach that can help distinguish different disturbances would be useful to forewarn the operators, increasing the reliability of the system operation.
    In this paper, a box counting-based fractal geometry approach is proposed for the disturbance detection, which was hardware-implemented by using the field programmable gate array. In the proposed approach, because the fractal geometry help quantize the behaviors of chaotics, a fractal dimension computation procedures has been embedded into the FPGA chips such that the disturbance-detection capability can be improved to a large scale. This detection approach has been tested on several power system disturbances. With the test results, they have validated the feasibility and practical values presented by the method for the application investigated.

    中文摘要 I 英文摘要 II 誌謝 III 目錄 IV 表目錄 VII 圖目錄 VIII 第一章 緒論 1 1-1 研究背景與動機 1 1-2 目的及方法 3 1-3 各章節摘要 3 第二章 相關理論之介紹 5 2-1 簡介 5 2-2 混沌理論 5 2-3 碎形幾何學 8 2-4 Lyapunov指數判別法 12 2-5 箱形計數法 13 第三章 FPGA與硬體描述語言 15 3-1 前言 15 3-2 FPGA之設計與簡介 16 3-2-1 ASIC之設計流程 16 3-2-2 FPGA的設計流程 18 3-2-3 FPGA之特色與架構 23 3-2-4 FPGA之Virtex系列晶片 23 3-3 硬體描述語言設計 30 3-3-1 硬體描述語言之簡介 30 3-3-2 Verilog模組之層次架構 32 第四章 硬體架構 34 4-1 簡介 34 4-2 類比電路 35 4-2-1 相位偵測 35 4-2-2 零交越點偵測 37 4-3 數位電路 40 4-3-1 類比/數位轉換器 40 4-3-2 數位/類比轉換器 44 4-3-3 數位加法器 48 4-3-4 數位減法器 50 4-3-5 數位乘法器 51 4-3-6 數位除法器 52 4-3-7 數位平方根運算器 54 4-3-8 數位自然對數運算器 55 4-4 運算箱形計數法於訊號擾動之模式驗證 58 4-4-1 電壓突降 59 4-4-2 電壓突升 61 4-4-3 電壓閃爍 62 4-4-4 電流波動 64 4-4-5 電磁干擾 66 4-4-6 鐵共振 68 第五章 實驗結果 69 5-1 簡介 69 5-2 類比電路實測分析 69 5-2-1 相位偵測電路實測訊號 69 5-2-2 零交越點偵測電路實測訊號 70 5-3 FPGA晶片規劃設計與使用資源分析 71 5-3-1 類比/數位轉換器實測訊號 72 5-3-2 數位/類比轉換器實測訊號 72 5-3-3 實現碎形維度計算於FPGA晶片之使用資源 74 5-4 實測結果 76 5-4-1 電流波動 76 5-4-2 電磁干擾 78 5-4-3 鐵共振 80 第六章 結論與未來研究方向 82 6-1 結論 82 6-2 未來研究方向 82 參考文獻 84 附錄A 88 作者簡介 93

    [1] Y. H. Gu and M. H. J. Bollen, “Time-Frequency and Time-Scale Domain Analysis of Voltage Disturbances”, IEEE Transactions on Power Delivery, Vol. 15, No. 4, October 2000, pp. 1279-1284.
    [2] D. Borras, M. Castilla, N. Moreno, and J. C. Montano, “Wavelet and Neural Structure: A New Tool for Diagnostic of Power System Disturbances”, IEEE Transactions on Industry Applications, Vol. 37, No. 1, January/February 2001, pp. 184-190.
    [3] S. J. Huang, C. T. Hsieh, and C. L. Huang, “Application of Morlet Wavelets to Supervise Power System Disturbances”, IEEE Transactions on Power Delivery, Vol. 14, No. 1, January 1999, pp. 235-243.
    [4] S. Santoso, W. M. Grady, E. J. Powers, J. Lamoree, and S. C. Bhatt, “Characterization of Distribution Power Quality Events with Fourier and Wavelet Transforms”, IEEE Transactions on Power Delivery, Vol. 15, No. 1, January 2000, pp. 247-254.
    [5] Y. H. Yam, C. S. Moo, and C. S. Chen, “Harmonic Analysis for Industrial Customers”, Proceeding of 1992 IEEE IAS Annual Meeting, pp.1579-1583.
    [6] C. S. Moo, Y. N. Chang, and P. P. Mok, “A Digital Measurement Scheme for Time-Varying Transient Harmonics”, IEEE Transactions on Power Delivery, Vol. 61, No. 2, April 1995, pp. 1588-1594.
    [7] H. A. Darwish, A. M. I. Taalab, and T. A. Kawady, “Development and Implementation of an ANN-Based Fault Diagnosis Scheme for Generator Winding Protection”, IEEE Transactions on Power Delivery, Vol. 16, No. 2, April 2001, pp. 208-214.
    [8] N. Kandil, V. K. Sood, K. Khorasani, and R. V. Patel, “Fault Identification in an AC-DC Transmission System Using Neural Networks”, IEEE Transactions on Power Systems, Vol. 7, No. 2, May 1992, pp. 812-819.
    [9] M. F. Barnsley and H. Rising, Fractals Everywhere, Second Edition, Academic Press Professional, Boston, USA, 1993.
    [10] J. Chen, T. K. Y. Lo, H. Leung, and J. Litva, “The Use of Fractals for Modeling EM Waves Scattering from Rough Sea Surface”, IEEE Transactions on Geoscience and Remote Sensing, Vol. 34, No. 4, July 1996, pp. 966-972.
    [11] K. H. Lin, K. M. Lam, and W. C. Siu, “Locating the Eye in Human Face Images Using Fractal Dimensions”, IEE Proceedings-Vision, Image and Signal Processing, Vol. 148, No. 6, December 2001, pp. 413-421.
    [12] F. Berizzi and E. Dalle-Mese, “Fractal Analysis of the Signal Scattered from the Sea Surface”, IEEE Transactions on Antennas and Propagation, Vol. 47, No. 2, February 1999, pp. 324-338.
    [13] B. Mandelbrot, The Fractal Geometry of Nature, W. H. Freeman and Co., San Francisco, USA, 1982.
    [14] M. Gschwind, V. Salapura, and D. Maurer, “FPGA Prototyping of A RISC Processor Core for Embedded Applications”, IEEE Transactions on Very Large Scale Integration Systems, Vol. 9, No. 2, April 2001, pp. 241-250.
    [15] IEEE Standard Verilog Hardware Description Language, IEEE Standard 1364-2001, September 2001.
    [16] A. V. Mamishev, B. D. Russell, and C. L. Benner, “Analysis of High Impedance Faults Using Fractal Techniques”, IEEE Transactions on Power Systems, Vol. 11, No. 1, February 1996, pp. 435-440.
    [17] S. Buczkowski, P. Hildgen, and L. Cartilier, “Measurements of Fractal Dimension by Box-Counting: A Critical Analysis of Data Scatter”, Physica A, Vol. 252, No. 1-2, April 1998, pp. 23-34.
    [18] J. Gleick, Chaos- Making a New Science, Commonwealth Publishing Co., Ltd., New York, USA, 1991.
    [19] M. Bodruzzaman, J. Cadzow, R. Shiavi, A. Kilroy, B. Dawant, and M. Wikes, “Hurst's Rescaled-Range Analysis and Fractal Dimension of Electromyographic Signal”, IEEE Proceedings of Southeastcon, Williamsburg, USA, April 1991, pp. 1121-1123.
    [20] http://gopher.ulb.ac.be/~pvouplin/pi/rsanalys.htm
    [21] A. Wolf, J. B. Swift, H. L. Swinney, and J. A. Vastano, “Determining Lyapunov Exponents from a Time Series”, Physica D, Vol. 16, 1985, pp. 285-317.
    [22] T. S. Parker and L. O. Chua, “Chaos: A Tutorial for Engineers”, Proceedings of the IEEE, Vol. 75, No. 8, August 1987, pp. 982-1008.
    [23] Y. H. Lim and D. C. Hamill, “Problems of Computing Lyapunov Exponents in Power Electronics”, IEEE International Symposium on Circuits and Systems, Orlando, USA, May-June 1999, pp.297-301.
    [24] K. Foroutan-pour, P. Dutilleul, and D. L. Smith, “Advances in the Implementation of the Box-Counting Method of Fractal Dimension Estimation”, Applied Mathematics and Computation, Vol. 105, No. 2-3, November 1999, pp. 195-210.
    [25] S. G. Makridakis, S. C. Wheelwright, and R. J. Hyndman, Forecasting- Methods and Applications, Third Edition, John Wiley & Sons, New York, USA, 1998.
    [26] N. G. Einspruch, J. L. Hilbert, Application Specific Integrated Circuit (ASIC) Technology, Academic Press, San Diego, USA, 1991.
    [27] http://www.xilinx.com/xlnx/xil_prodcat_landingpage.jsp?title=Virtex_Series
    [28] http://direct.xilinx.com/bvdocs/publications/ds003-1.pdf
    [29] http://direct.xilinx.com/bvdocs/publications/ds003-2.pdf
    [30] http://direct.xilinx.com/bvdocs/publications/ds003-3.pdf
    [31] http://direct.xilinx.com/bvdocs/publications/ds003-4.pdf
    [32] V. Sagdeo, The Complete Verilog Book, Kluwer Academic Publishers, Boston, USA, 1998.
    [33] E. Sternheim, R.Singh, and Y. Trivedi, Digital Design with Verilog HDL, Automatic Pub. Co., Cupertino, Canada, 1990.
    [34] M. G. Arnold, Verilog Digital Computer Design-Algorithms into Hardware, Prentice Hall PTR, New Jersey, USA, 1999.
    [35] K. Coffman, Real World FPGA Design with Verilog, Prentice Hall PTR, New Jersey, USA, 2000.
    [36] The AD7874 Datasheet, Analog Devices, Inc., Norwood, USA.
    [37] The AD7249 Datasheet, Analog Devices, Inc., Norwood, USA.
    [38] J. L. Hennessy, D. A. Patterson, and J. L. Larus, Computer Organization and Design - The Hardware/Software Interface, Second Edition, Morgan Kaufmann Publishers, California, USA, 1998.
    [39] T. C. Bartee, Computer Architecture and Logic Design, McGraw-Hall, New York, USA, 1991.
    [40] http://www.ai.mit.edu/people/hqm/imode/fplib/FP.java.html
    [41] R. W. Doerfler, Dead Reckoning - Calculating without Instruments, Gulf Pub. Co., Houston, USA, 1993.
    [42] A. E. A. Araujo, A. C. Soudack, and J. R. Marti, “Ferroresonance in Power Systems: Chaotic Behaviour”, IEE Proceeding-Generation, Transmission and Distribution, Vancouver, Canada, May 1993, pp. 237-240.
    [43] J. R. Marti and A. C. Soudack, “Ferroresonance in Power Systems: Fundamental Solutions ”, IEE Proceedings-Generation, Transmission and Distribution, Vancouver, Canada, July 1991, pp. 321-329.

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