渦輪碼(turbo code)因為能夠提供優秀的錯誤更正能力，而被廣泛地運用在各種的無線通訊標準中。作為新一代的通訊標準，3GPP-LTE/LTE-A系統採用了渦輪碼作為其通道編碼(channel coding)的架構，並且有著更高產出率(throughput)的需求。為了滿足3GPP-LTE/LTE-A系統中對於產出率的要求，經常會使用高度平行化的處理架構來提升渦輪解碼器的產出率。如何降低平行化交錯器(interleaver)的複雜度以及有效的提高產出率亦是渦輪碼設計中重要的課題之一。
在本論文中，我們藉由二維的相差值運算交錯器以及簡化前置運算的平行式視窗演算法來呈現一個高效能的解碼器架構，並且達到3GPP-LTE/LTE-A系統率的要求。在所提出的交錯器架構中，運用了具有低複雜度計算方法且可以支持高度平行化的解碼架構。除此之外，在最大事後機率演算法中則是提出了一個可以藉由減少前置運算來有效地提升產出率而不降低解碼效能表現的演算法。實驗結果顯示，此渦輪解碼器相較於其他高產出率的設計具有大約24.53%常態化面積效率的改善。

Turbo codes have been widely adopted by wireless communication standards due to their excellent error correction performance. As the next-generation standard, 3GPP-LTE/LTE-A systems use turbo coding as the channel coding scheme with a higher throughput demand. To meet this higher data rate requirement, the highly-parallel turbo decoder architecture is frequently applied. How to reduce the complexity of parallel interleaver and increase the throughput rate are essential to the turbo decoder design.
In this thesis, an efficient architecture of turbo decoder is presented by using two-dimension differential calculation interleaver and dummy calculation-reduced parallel-window algorithm to achieve the throughput demand in 3GPP-LTE/LTE-A systems. The proposed interleaver can support highly parallel soft-input/soft-output (SISO) decoding architecture with low complexity computation. Furthermore, the proposed decoding algorithm can increase the throughput rate without performance degradation by reducing the dummy calculation. Experimental results show that the developed turbo decoder can improve the normalized area efficiency by about 24.53% compared to related works for high-throughput implementation.

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