本論文提出一個可以自動補償功能的電路 ( A 10Gbs Serdes Circuit with Auto Impedence Compensation)，主要用於傳輸大量資料的傳輸裝置。並可以適用於不同Loss的PCB板長度並增加訊號的辨識度 和品質 進而 減少 Rx 端的負擔。在 過去論文的架構裡，常常都是 補償在 固定的 Loss 環境 ，但是當 Loss 改變時，常常造成訊號品質的不佳，所以本論文中加了偵測 Loss 變化的 Monitor，可以隨著Loss的改變而更改成不同的補償，以達到訊號品質的最佳化，並讓Rx端的電路減少負擔。
FFE Feed Forward Equalizer經過了分析後採用了架構為2 tap的 FFE Driver則是 採用SST(Source Series Terminated) 架構使用 2 Tap是因為低功耗以及通道的衰減的考量，所以設定為這個的數量，此外為了讓整個系統更低功耗 且更容易切換不同的補償，用了跟一般傳統D river 不一樣的電路，使用了經過改版後的SST Source Series Terminated Driver ，此為數位控制的Driver，主要利用PMOS和 NMOS中的開和關，來達到不同的DC準位。其傳輸端最高承受的 Loss 為 25dB的通道 (FR4 材質)。而 Monitor 方面使用了BER(Bit Error Rate)的量測方式，驗證所提出Auto Detected的訊號正確率比傳統在 Tx端固定補償的方式來的高。此晶片已透過TSMC 90nm 1P6M CMOS Process 製作，核心面積為 1.1190 mm 2 。
由量測結果顯示，在供應電壓1V下，其功率消耗為15.8 mW，技術指標(Figure of Merit, FoM)則為1.58 pJ/b。

This paper presents the design of a 10 Gb/s serial link transmitter with both 2 tap feed forward equalizer (FFE) and capaci tance monitor, and then it improve the performance of the equalization system in the transmitter. This design includes low power FFE that use s source series terminated (SST) driver and low power design with a small amount of tap. In addition to FFE, this transmitter includes an impedance detector to auto detect the channel loss. The FFE can know the different board losses in advance to compensate for the signal at the t ime and improve the signal quality on the board with different losses . The proposed transmitter is fabricated in TSMC 90 nm technology. The transmitter achieves 10 Gb/s maximum data rate under the chip on board assembly. It can withstand the loss of up to 25 dB. The eye width measured is 0.63 UI in 25 dB loss. The measured energy efficiency of the transmitter was 1.58 pJ/b. The transmitter consumes 15.8 mW, wherein the power supply is 1.0 V and the input CLK signal frequency is 5 GHz.

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