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研究生: 方禹
Fang, Yu
論文名稱: 以分子動力學模擬閘極層疊結構中的偶極層生成
Molecular dynamics simulations of dipole layer formation in gate stacks
指導教授: 高國興
Kao, Kuo-Hsing
共同指導教授: 許渭州
Hsu, Wei-Chou
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2018
畢業學年度: 106
語文別: 英文
論文頁數: 41
中文關鍵詞: 分子動力學偶極層閘極全環表面能
外文關鍵詞: molecular dynamics, dipole layer, gate-all-around, surface energy
相關次數: 點閱:156下載:15
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  • 為了確認多層介電層界面對閾值電壓的影響,在介面氧離子擴散的理論基礎下,此論文通過應用反應力場(ReaxFF)的分子動力學(MD)模擬研究了平面以及閘極全環(GAA)結構中介電層之間原子的熱動力學和相互擴散,並通過電負度及表面能的計算來證明它。基於原子分佈,在介電層界面處以一維柏松方程式計算內建電場和電勢。研究顯示,氧原子會在介電層界面擴散並形成偶極層,其產生之內建電位取決於矽納米線(NW)的直徑,並與內外表面能量的特徵有關。

    In order to confirm the effact of the interface of the multilayer dielectric layer on the threshold voltage, based on the theory of interface oxygen ion diffusion, this study investigates the thermal dynamics and inter-diffusion of atoms between dielectrics in a gate-all-around (GAA) structure by means of Reactive force field (ReaxFF) applied molecular dynamics (MD) simulations and prove it through the electronic negativity calculation of surface energy. Based on the atomic distribution, the built-in electric field and potential are calculated by Poisson equation at the dielectric interface. We show that the build-in potential is dependent on the diameter of the Silicon nanowire (NW) and it is related to the feature of inner and outer surface energy.

    中文摘要 II Abstract III 誌謝 IV Contents V Figure captions VI Chapter Ⅰ Introduction 1 1.1 CMOS Scaling 2 1.2 Gate All Around Nanowire Structure 3 1.3 Threshold Voltage and dipole formation 4 1.4 Research Objective and Dissertation Outline 6 Chapter II Theoretical Approach 8 2.1 Molecular Dynamics 8 2.1.1 Equation of motion 10 2.1.2 Force field 11 2.3 Electronegativity Equilibrium method 13 2.4 Thermodynamic Ensembles 14 2.5 Flow Chart of Molecular Dynamics 15 Chapter III Flat-band Voltage Shift of Planar Structure Gate Stack 16 3.1 Simulation method 16 3.2 Mesh Independent 19 3.3 Results and Analysis 20 3.4 Summary 27 Chapter IV Build-in Voltage of Gate all around Structure Gate Stack 28 4.1 Simulation method 28 4.2 Results and Analysis 31 4.3 Summary 34 Chapter V Conclusion and Future work 35 5.1 Conclusion 35 5.2 Future work 35 References 36

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