本論文主要以磊晶及製程之改變來提升LED的發光效率，同時對高電流操作所導致的效率下降以及溫度升高時對LED效率之影響做一討論，其中也針對LED可靠度驗證時，發現可能的失效模式，提出我們的實驗結果供大家在設計LED時之參考。
在我們研究中，在一般基板上成長表面粗化結構，在已經是最佳化的磊晶結構中，我們發現將極高的Si濃度,>1019 #/cm3,參雜在特定區域,N layer進入 strain releasing layer以及strain releasing layer與發光層之間,對LED的電氣特性會產生極大的變化，可提升數倍逆向偏壓的能力，同時也助於輸出power增加。
先前有研究指出:利用高溫蝕刻去除雷射切割所造成的殘留物，以及缺陷選擇性蝕刻，可造成晶粒外圍形成倒角，提升光萃取的效益，當時的研究是在一般平的基板下進行。我們則在圖案化基板上進行相關的實驗，我們發現磊晶薄膜品質大為提升，將會導致缺陷選擇性蝕刻方法失效，故我們經由不同的緩衝層成長,刻意造成底層的品質差異，而可以進行缺陷選擇性蝕刻方法。在我們的實驗中，使用高溫AlN buffer的LED抗蝕刻能力略弱於低溫 GaN緩衝層，在蝕刻液溫度250 ℃時，浸泡10分鐘後，使用高溫AlN buffer的LED 其mesa呈倒角狀，同時部分GaN層被蝕去導致部分基板區裸露，其上的PSS形狀仍然存在，這一組樣品在高電流操作下輸出power有12%提升。
此外我們也評估barrier厚度對LEDs操作在高電流密度時效率的影響。習知的研究多集中在電子傳輸機制的探討。我們則藉由模擬的結果發現:barrier厚度減薄，有助於Hole載子在多重發光量子井中的分布更均勻，進而提升LEDs在高電流注入時的效率。
我們針對變化barrier厚度設計幾組實驗。我們的實驗結果顯示:barrier的厚度愈薄，其在高電流密度操作時的效率也愈好，但是同時也發現在低電流密度區操作時，發光效率會下降，推測是低電流操作時，發光較集中在靠近P layer的發光層在主導，Barrier減薄作法，會使hole分布改變，如前所述，所以影響低電流密度時發光效率。
我們也針對LED操作在不同電流密度時的 Hot-Cold Factor影響的因素做一討論。我們實驗中設計了不同的electron blocking layer, EBL,厚度及last barrier, LB,厚度對Hot-Cold Factor的影響做探討。實驗結果顯示兩者都有重要的影響，但是我們也發現EBL厚度增加的效果有限，LB厚度的變化對Hot-Cold Factor更為顯著，在其中一組LB厚度增加為6倍的實驗中，在120 mA正常操作電流時，我們得到Hot-Cold Factor 1.049，在兩倍電流操作時仍維持卓越的Hot-Cold Factor特性。所以我們認為可以透過結構設計而使Hot-Cold Factor獲得改良。
在LED製程中，我們發現為了提升亮度而減少傳輸線寬，以及在覆蓋金屬例如Fingers及Pads下放置反射層，已是常用的手法。而Al是常被用來當作反射層的材料之一。我們研究發現在極端的可靠度測試環境下, 80℃, 125 A/cm2,在特定的位置會有Al的析出，我們認為其為Al電致遷移現象，這點在LED的失效機制中尚未被接露，可供後續者在設計LED layout時參考。

In the dissertation we approached the high efficiency LED via both epitaxy growth and chip process. Meanwhile we investigated the efficiency drop of LED at high current injection and the influence on LED output power while raising temperature. And then during the aging experiment, we found a potential failure mode for LED chip. We proposed out our experiment results for reference in the design of LED chip.
In our study, introducing Si delta-doping (Si-DD) layers on specified positions, the interface of N layer and the first strain releasing multiple quantum wells, the interface of the first strain releasing multiple quantum wells and the second strain releasing multiple quantum wells, based on a well optimized LED grown on a planar substrate can greatly change the LED electric characteristics, many times improvement of reverse bias was observed, and improve the output power.
Paper research told us that remove the laser debris by high temperature solution and introducing the defect selective etching can result in truncate sidewalls surrounded the chip mesa to improve the extraction efficiency. The author experimented with it on a standard sapphire substrate. Instead of standard substrate, we applied the defect selective etching on LEDs grown on the pattern sapphire substrate, PSS. We found the great improvement of film quality due to grow on PSS causes the failure of defect selective etching. So we intended to make the buffer a little inferior via a high temperature AlN layer as the buffer layer to enable the defect selective etching.
Our experiment indicated that LEDs with HT AlN as buffer has a little poor ability against high temperature etching than LEDs with LT GaN as buffer. Undercut sidewalls of mesa for LEDs with high temperature AlN buffer layer, HT AlN, were seen after dipping them in 250℃ H3PO4 solution for 10 minutes. The change of mesa shape and the uncovered pattern sapphire cones play as the media to lead out more light from the chip. Our data indicated a 12% output power enhancement at one ampere operation.
Besides, we also investigate the influence of varying the barrier thickness on the efficiency of nitride LED operating at high current density. The existing studies used to focus on the discussion of electron transportation. With a simulation result, the holes distribution within the multiple quantum wells might play more important role at high current injection. We designed experiments with different barrier thickness. Our experiment results suggest thinner the barrier, better the efficiency at high current injection. However, it’s trade-off the lower efficiency at lower current density. We thought the change of holes distribution in multiple quantum wells leads the efficiency poor at lower current density.
We also discussed on the mechanism of Hot-Cold Factor for LEDs running at different current density. Different electron blocking layer thickness and different last barrier thickness were designed for our experiment. The experimental results suggest both electron blocking layer and last barrier have significant influence on Hot-Cold Factor. And we found a finite effect of EBL thickness to Hot-Cold Factor. Instead, our data suggest more significant effect the last barrier thickness is. An extreme case the sample with six times LB thickness delivered a very superior Hot-Cold Factor, the values is 1.049 at 120 mA. In additions, samples with thicker LB also keep such advantage at two times current density. Our result indicated an improvement on Hot-Cold Factor can be achieved via design of LED structure.
Narrowing the metal finger width and using a reflector structure under metal fingers and pads were used to increase output power in the fabrication of LED chip. And Al has been demonstrated as one of the best candidates for the reflector. In our study, we found both measures may cause failure due to the Al electro-migration under tough aging condition such as 80℃, 125 A/cm2. We found the Al whiskers emerge out usually at certain position of metal fingers. The whisker length will increase with aging time. Eventually the whiskers touch other parts of chip leading the chip short. Al migration such as a failure mechanism that has to be taken into account in the design of HV-LEDs.

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