MPEG-2視訊播放器實現及其H.264/AVC轉碼器之設計

林文生 楊家輝

國立成功大學 電腦與通信工程研究所

摘要

本論文主要分為兩部分，其一主要是研究在德州儀器公司出產之DM270系統單晶片，設計出一個適合於嵌入式系統下之MPEG-2視訊解碼韌體系統。欲在DSP端實現本系統必須克服嚴格記憶體限制、平行化及加速指令效率等問題。本系統的實現，首先把關鍵的程式改以組合語言撰寫，接著使用系統單晶片中的共工處理器來加速，並利用硬體與記憶體的平行化，以達到即時解碼的效能。實驗結果顯示MPEG-2播放系統在CIF與QVGA影像大小下可達到即時解碼的效能。
另一部份，本論文也針對MPEG-2轉H.264/AVC轉碼器之設計提出快速演算法加速其轉碼流程，本論文主要利用MPEG-2解碼時獲得的資料來加速H.264/AVC編碼。基於離散餘弦轉換的快速4x4區塊intra預測演算法可加速4x4區塊在做非直流預測時模式的決定，快速Inter動態預測演算法則可加速7種Inter區塊模式的決定。

MPEG-2 Video Player Realization And It’s H.264/AVC Transcoder

Wen-Sheng Lin and Jar-Ferr Yang

Institute of Computer and Communication Engineering
National Chen Kung University
No.1 University Road, Tainan, Taiwan, R.O.C.

ABSTRACT
In this first part of the thesis, the DM270 System-on-a-Chip (SoC) manufactured from Texas Instruments (TI) is our mainly research, and designing a firmware system of the MPEG-2 video decoder suitable for an embedded system. When implementing this system at DSP side, we encounter three problems and have to overcome, such as strictly limited memory space, parallelization, and the efficiency of accelerative instructions. In the beginning, the crucial C codes in our system were re-written as assembly codes. Then, several coprocessors of the SoC help us to accelerate the MPEG-2 decoder, and parallelizing hardware and memories to achieve the real-time decoding. The simulation results show that performance of MPEG-2 video on demand player reaching the CIF and QVGA size images in real-time decoding.
In this second part of the thesis, we also design a fast MPEG-2 to H.264/AVC transcoder. When MPEG-2 decoder decodes stream we get some useful data, and then we use them to accelerate H.264/AVC encoder to encode. DCT-Based Fast 4x4 Block Intra Prediction can help us accelerate the mode decision of 4x4 block AC prediction ;Fast Inter Motion Prediction can accelerate the decision of seven inter prediction mode.

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