在奈米世代積體電路中，信號傳輸延遲主要是由多層導體連線寄生電容和電阻產生，為了降低訊號傳遞的時間延遲；在降低電阻方面，現今以金屬銅（電阻率為1.7μΩ-cm）來取代傳統的金屬鋁（電阻率為2.7μΩ-cm）成為導線的連線系統。而在降低電容方面，則朝向低介電常數 ( low-k ) 材料發展。但是銅在鑲嵌製程中與電性操作的環境下，因溫度與電場的影響，銅極易擴散至低介電常數材料中，並與之發生反應，造成材料特性的劣化與漏電流增大，甚至導致介電質崩潰。因此，需要在銅與介電質之間加一層阻障銅擴散到介電層的低電阻值金屬材料。在未來的阻障層材料需要更低的電阻值。鎢和鈷的電阻值比鉭來的低。本論文研究磷摻在鎢鈷薄膜和鎢薄膜的阻障效果。
我們由AES、SIMS的縱深分佈圖得知退火400度和退火500度半小時的阻障層都沒有失效，而XRD也沒有出現CuSi的峰值。但磷加得愈多，片電阻值也會愈大。但由TEM可以看出500度退火半小時的銅和鎢鈷的界面慢慢消失。這由可能是因為鈷和銅在退火溫度500度時有相的形成。因此磷摻雜鎢鈷薄膜的阻障效果在更高溫度有可能有退化現像。因此磷摻雜在鈷鎢薄膜7nm和鎢薄膜16nm無法確定是否能有效幫忙阻擋銅原子的擴散，未來還需要做更進一步的研究。

Signal transmission delay of IC backend is primarily caused by the parasitic resistance and capacitance (RC) in the multilevel interconnects. Furthermore, RC delay will be the dominant factor of the whole circuit in the sub-90 nm generation.
To lower resistance, aluminum (2.7 μΩ-cm) was replaced by copper (1.7 μΩ-cm) for the IC interconnection system. As of decrease capacitance, low dielectric constant (low K) insulator was used. Dual damascene process was developed for these materials changes.
However, copper diffuse into low-k material easier than non-low k interconnect under thermal stress and electric field caused copper interact with low-k material, which raises the leakage current and also leads to low k dielectric breakdown. Therefore, copper barrier is needed to block copper diffusion. Traditional copper barrier is Ta/TaN film and lower barrier resistivity is necessary for future generations.
W and Co both have lower resistivity than Ta. This thesis studied the barrier effectiveness when phosphorous doped to WCo and W films. The AES and SIMS depth profiles show that both barriers did not fail after 30 minute 400 oC and 500oC annealing. The XRD graphs also do not have any CuSix peaks. Higher phosphorous doping caused higher barrier sheet resistance. The TEM graph indicates that the interface between Cu and WCo film become less clear or disappear. Co and Cu alloy maybe formed during the 500oC annealing. The barrier effectiveness may further deteriorate at higher temperature for the 7 nm P doped WCo film. Because it is 7 nm WCo compare to 16nm W film, phosphorous doped barrier helps blocking Cu diffusion or not is not clear and further study is needed to verify.

[1]T.Harada,M.Takahashi,K.Murakami,H.Korogi,T.Sasaki,T.Hattori,S.Ogawa, and T.Ueda,”Manufacturable Low Keff (Keff<2.5) Cu Interconnects by Selective / Low DamageAir Gap Formation”,IEEE,1-4244-0103-8, 2006.
[2]Jiang Tao,Nathan W. Cheung,IEEE Electron Device Letters,p.249, 14(5),1993.
[3]R.Kroger,M.Eizenberg,D.Cong,N.Yoshida,L.Y.Chen,S.Ramaswami,and D. Carl, J. Electrochem. Soc.,146, 3248(1999).
[4]S.K.Koh,S.C Choi,K.H.Kim,H.-J.Jung,G.J.Choi,H.S.Yang,andY.S. Cho,Thin Solid Films,p347,121(1999).
[5]E.C.Cooney III,D.C.Strippe,and J.W.korejwa,J. Vac.Sci. Technol. A, 18, 1550(2000).
[6]S.M.Rossnagel, and J.Hopwood, J.Vac. Sci. TechnolB, 12, 449(1994).
[7]N.Motegi,Y.Kashimoto,K.Nagotani,S.Takahashi,T.Kondo,Y.Misuzawa,andI.
Nakayama,J. Vac. Sci.Technol B,13,1906(1995).
[8]L.J Friedrich, S.K. Dew, M.J. Brett, and T.Smy,J. Vac.Sci. Technol. B,17,186(1999).
[9]M.Georgiadow,D.Veyret,R.L.Sani,and R.C.Alkire,J .Electrochem. Soc.,148,
C54(2001).
[10]W.C. Gau,T.C.Chang,Y.S.Lin,J.C.Hu,L.J.Chen,C.Y.Chang,and C.L.Cheng,”J. Vac.Sci.Technol.A”, 18,656(2000).
[11]S.-Y.Chiu, J.-M.Shieh, S.-C Chang, K.-C Lin, B.-T.Dai,C.-F.chen, and M.- S. Feng, “J. Vac. Sci.Technol B”, 18,2835(2000).
[12]W.-T. Tseng, C.-H. Lo, S.-C. Lee,J. Electrochem. Soc.,148, C327(2001).
[13]W.-T. Tseng, C.-H. Lo, S.-C. Lee,J. Electrochem. Soc.,148, C333(2001).
[14]林建宏,謝維仁,李慈莉,陳偉鑫,寇崇善,施漢章；”電漿離子佈植Cu/Pd 晶種無電鍍銅膜之退火效應研究”,2001年中華民國鍍膜科技研討會暨國科會計劃研究成果發表會論文集第181~186頁，2001年8月30~31.
[15]R.L.Jackson,et al.,”Solid State Technology”,p.49,March 1998.
[16]P.Singer ,”Semiconductor International”,p.79, August 1997.
[17]X. W. Lin and D. Pramanik,”Solid State Technology”,p.63,October 1998.
[18]M.Hauder et al；”Microelectronic Engineering”,Vol.60,p.51 ( 2002 )
[19]龍文安,”半導體微影技術”p739~p824，2004
[20]莊達人,”VLS製造技術”,高立圖書有限公司,729~764,October 1995
[21]劉偉隆,林淳杰,曾春風,陳文照,＂物理冶金”,全華科技, 2004
[22]汪建民，“Materials Analysis“中國材料科學學會,2003
[23]溫金瑞,”Co Thin Films Deposited by DC Magnetron Sputtering and Their Applications for OME Process”,國立成功大學91學年度碩士論文.
[24]Whippany, “PHOSPHOROSILICAFILM 5 x 1020 “, EMULSITONE COMPANY
[25]kittel,”Introduction to Solid State Physics 8/E”JOHN WILEY&Sons
[26]H.Bubert and H.Jenett,”Surface and Thin Film Analysis”
[27]W.D.Chen,Y.D.Cui,and C.C.Hsu,”Interaction of Co with Si and SiOs during rapid thermal annealing”, J. Appl.Phys. 69(11),1 June 1991
[28]W.R.Runyan and T.J.Shaffner.”Semiconductor measurements and instrumentation”.