簡易檢索 / 詳目顯示

研究生: 林仁達
Lin, Jen-Ta
論文名稱: 氮化鉭金屬閘極搭配氮化鋁介電層薄膜電晶體(TFT)之研製
The Fabrication of Tantalum Nitride Metal Gate and Aluminium Nitride Gate Insulator for Thin-film Transistors
指導教授: 王水進
Wang, Shui-Jinn
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2006
畢業學年度: 94
語文別: 中文
論文頁數: 62
中文關鍵詞: 氮化鋁氮化鉭低溫複晶矽薄膜電晶體
外文關鍵詞: AlN, TaN, LTPS, TFT
相關次數: 點閱:62下載:2
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 薄膜電晶體適用於液晶面板上做為儲存電容開關,為了提高驅動電流與閘極控制力,選用high-κ材料做為介電層是未來的一個趨勢。鋁閘極的熱穩定性不佳,會限制其後製程回火溫度,而傳統多晶矽閘與high-κ材料之接面,向來存有極大缺陷密度。氮基金屬閘極氮化鉭(TaN),可與氮化鋁(AlN)有良好的接面,而氮化鉭的熱穩定性,將使其後製程溫度較不受限制。

    本論文以氮化鉭及氮化鋁分別做為金屬閘極與閘極介電層材料,進行電容及薄膜電晶體製作與電特性量測分析。於物性分析方面,係利用X光繞射分析(XRD)、化學分析電子儀(XPS)與歐傑電子分析儀(AES)等儀器分析氮化鉭與氮化鋁薄膜之組成、結構及成分分布等。實驗結果顯示,所得氮與鉭之原子比例為4:1,射頻功率180 W所獲得的金屬鍵結較強,結構則以(1,1,0)的相位為主,具有較佳的熱穩定性,配合TEM與實驗C-V特性分析,所得氮化鋁之κ值約為10。

    我們利用氮化鉭/氮化鋁/p-Si MOS結構進行C-V特性和漏電流之量測,分析探討氮化鉭與氮化鋁之接面特性。同時,我門亦進行以氮化鉭/氮化鋁為閘極結構TFT之ID-VD和ID-VG等特性量測,所得TFT之Ion/Ioff約達六個數量級;另由ID-VG萃取出臨界電壓約為0.77 V、次臨界擺幅為1.6 V/decade。由實驗結果顯示,以氮化鉭為金屬閘極搭配氮化鋁閘極介電層的結構,適用於N型薄膜電晶體,深具TFT-LCD方面之應用潛力◦

    Thin Film Transistors (TFTs) have been widely used as a switch of LCD pixels. To increase driving current and enhance gate control capability, there is a tendency towards using high-κ materials as gate insulator in the near future. Conventional TFTs usually use aluminium (Al) or poly-silicon (p-Si) as the gate material. However, the poor thermal stability of aluminium gate electrode limits thermal processing of the device, while defects at the interface between traditional poly-Si gate and dielectric degrade device performances.

    In this thesis, tantalum nitride (TaN) and Aluminium Nitride (AlN) were employed to serve as gate metal and gate insulator for future TFT-LCD technology, respectively. Both these two films were sputtering deposited and thermally annealed. The physical properties and compositions of TaN film were analyzed using XRD, XPS, and AES. Experimental results shows that TaN films with relatively stronger binding energy could be obtained from a RF sputtering with a power of 180 W and the main phase of the film is (110).

    MIS capacitances with TaN/AlN/p-Si structure and n-TFTs based on the same MOS structure were fabricated and characterized. C-V and leakage current for the MIS capacitances as well as IDS-VDS and IDS-VGS characteristics of TFTs were also measured and analyzed. According to C-V curves and TEM images, the high-κ AlN films prepared in this work were with a κ-value of 10 and a minimum EOT around 7 nm has been realized. Typical values of Ion/Ioff ratio, threshold voltage, and subthreshold swing (SS) obtained form the fabricated TFTs with TaN(300 nm)/AlN(18 nm)/poly-Si(100 nm) MIS structure were 106, 0.77 V, and 1.6 V/decade, respectively.

    Though further studies are still required, our preliminary experimental results suggest that the sputtering deposited TaN and AlN films might work well for future TFTs.

    中文摘要 i 英文摘要 iii 致謝 v 目錄 vi 表目錄 viii 圖目錄 ix 第一章緒論 1.1 大尺寸TFT-LCD顯示器歷史發展 1 1.2 低溫複晶矽特性與大尺寸TFT-LCD所需克服問題 2 1.3 研究動機 6 第二章低溫複晶矽薄膜電晶體基礎理論 2.1 TFT薄膜電晶體介紹 7 2.2 複晶矽成長方式 19 2.3 High-κ材料於薄膜電晶體的特性改善 21 2.4 AlN的材料特性 22 2.5氮化鉭(TaN)的材料特性 24 第三章電容與薄膜電晶體製作 3.1 氮化鉭搭配氮化鋁電容的製作流程 26 3.2 Si再結晶製程 30 3.3 薄膜電晶體製作流程 31 3.4 量測使用儀器 35 第四章材料物性分析 4.1 Si薄膜分析 36 4.2 AlN材料特性 37 4.3 TaN材料特性 39 第五章薄膜電晶體電性分析與討論 5.1 TaN/ AlN/Silicon金氧半電容特性 48 5.2 TaN/ AlN/Silicon薄膜電晶體的基本電性量測 53 第六章 結論與未來研究 6.1 結論 58 6.2 未來研究之建議 59 參考文獻 60

    [1] G. H. Heilmeier, L. A. Zanoni, L. A. Barton, “Dynamic scattering—
    A new electrooptic effect in nematic liquid crystals,” Process
    IEEE, Vol.56, pp.1162, 1968.

    [2] T.P. Brody, J.A Asars, G.D. Dixon, ” A 6 × 6 inch 20 lines-per-inch
    liquid-crystal display panel,” IEEE Transactions on Electron Devices,
    Vol.20, pp.995, 1973.

    [3] H. Kimura et al., SID Digest, pp.268, 2001.

    [4] http://www.toppoly.com/

    [5] Zhibin Xiong; Haitao Liu; Chunxiang Zhu; Sin, J.K.O,
    “Characteristics of High-k Spacer Offset-Gated Polysilicon TFTs,”
    IEEE Transactions on Electron Devices, Vol. 51, No. 8, August 2004.

    [6] K. M. Chang, W. C. Yang, and C. P. Tsai, “Electrical characteristics
    of low temperature polysilicon TFT with a novel TEOS/oxynitride stack
    gate dielectric” , IEEE Electron Device Letters, vol. 24, no. 8, pp.
    512–514, Aug. 2003.

    [7] L. L. Kazmerski, “Polycrystalline and Amorphous Thin Films and
    Devices,” Academic Press, 1980.

    [8] T. A. Fjeldly, “Introduction to Device Modeling and Circuit
    Simulation”, John Wiley & Sons, 1998.

    [9] J.-P. Colinge, Silicon-on-insulator Technology : Materials To VLSI,
    2nd ed., Kluwer Academic Publishers, 1997.

    [10] 陳志強, LTPS低溫複晶矽顯示技術, 全華, 台北市, 2004

    [11] T. Serikawa, S. Shirai, K. Nakagawa., S. Takaoka., K. Oto, K. Murase,
    and .i Ishida, “Transport Properties in Band-Tails of High Mobility
    Poly-Si TFTs,” Japanese Journal of Applied Physics, Vol.35, No.2B,
    pp.937, 1996.

    [12] I.-W Wu, T.-Y. Huang, W.B. Jackson, A.G. Lewis, A. Chiang, “
    Passivation kinetics of two types of defects in polysilicon TFT by
    plasma hydrogenation,” IEEE Electron Devices Letters, Vol.12, pp.
    181, 1991.

    [13] M. Wakagi et al., Electrochemical Soc. Proc., Vol.98-22, pp.237,
    1998.

    [14] Hsin-Li Chen, Ching-Yuan Wu, “A new I-V model considering the impact-
    ionization effect initiated by the DIGBL current for the intrinsic n-
    channel poly-Si TFTs,” IEEE Transactions on Electron Devices, Vol.46,
    No.4, pp.722 , 1999.

    [15] M. Valdinoci, L. Colalongo, G. Baccarani, G. Fortunato, A. Pecora,
    I. Policicchio, “Floating body effects in polysilicon thin-film
    transistors,” IEEE Transactions on Electron Devices, Vol.44, No.12,
    pp. 2234, 1997.

    [16] G. A. Armstrong, S. D. Brotherton, J. R. Ayres, “A comparison of the
    kink effect in polysilicon thin film transistors and silicon on
    insulator transistors,” Solid-State Electronics, Vol.39, No.9, pp.
    1337, 1996.

    [17] K. Kanzaki, et al., SID Digests, pp.242, 2001.

    [18] R.E.I. Schropp, material research Society (MRS) Symposium
    Proceedings, Vol.609, pp.A31.1, 2000.

    [19] M. Matsui, Y. Shiraki, and E. Maruyama, “Low-temperature formation
    of polycrystalline silicon films by molecular beam deposition,”
    Japanese Journal of Applied Physics, Vol.53, No.2, pp.995 , 1982.

    [20] T. Serikawa, F. Omata, “High-quality polycrystalline Si TFTs
    fabricated on stainless-steel foils by using sputtered Si films,”
    IEEE Transactions on Electron Devices, Vol.49, No.5, pp.820, 2002.

    [21] H. Tokioka et al., Int’l. Workshop on AMLCD, pp.113, 2000.

    [22] patent US54424244, US5561081, US6027960, US6291320

    [23] E. Ruiz, santigo alvarez, P. Alemany, “Electronic Structure and
    Properties of AlN”, Physical Review B, 497115-7123, 1994.

    [24] P. K. Kuo, G. W. Auner, and Z. L. Wu, “Microstructure and
    ThermalConductivity of Epitaxial AlN Thin Films”, Thin Solid Films,
    223-227, 1994.

    [25] 丁勝懋, 雷射工程導論, 中央圖書出版社, p307-313, 187-197, 271-295,
    1998.

    [26] Robert Stephen Sposili, “Crystalline Silicon Thin Film For Thin-Film
    Transistor Applications Via Excimer Laser Irradiation”, Columbia
    University, 2001.

    [27] http://srdata.nist.gov/xps/

    [28] B. F. Hung, K. C. Chiang, C. C. Huang, Albert Chin, “High-
    Performance Poly-Silicon TFTs Incorporating LaAlO3 as the Gate
    Dielectric,” IEEE Electron Devices Letters, vol. 26, no.6, pp. 384–
    386, June 2005.

    [29] C.W. Lin, M. Z. Yang, C. C. Yeh, L. J. Cheng, T. Y. Huang, H. C.
    Cheng, H. C. Lin, T. S. Chao, and C. Y. Chang, “Effects of plasma
    treatments, substrate types, and crystallization methods on
    performance and reliability of low temperature polysilicon TFTs,” in
    IEDM Technical Digests, pp. 305–308 , 1999.

    下載圖示 校內:2007-07-13公開
    校外:2007-07-13公開
    QR CODE