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研究生: 林忠儀
Lin, Zhong-Yi
論文名稱: 增強型p通道氮化鎵金氧半場效電晶體之研製及歐姆接觸特性之優化
Development of Enhancement-Mode p-Channel GaN MOSFETs and Optimization of Ohmic Contact Characteristics
指導教授: 王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2024
畢業學年度: 112
語文別: 英文
論文頁數: 135
中文關鍵詞: 氮化鎵增強型p通道金氧半場效電晶體自對準閘極蝕刻表面處理
外文關鍵詞: GaN, enhancement mode, p-channel, MOSFETs, self-aligned gate etching, surface treatment
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  • 為了能和氮化鎵功率開關元件集成整合,消除晶片間的寄生電感,氮化鎵互補金屬氧化物半導體的開發備受關注,其中p通道之氮化鎵場效電晶體的製備最具挑戰,除了電性要和n通道元件互相匹配外,實現增強模式的元件也是必要的,以迎合降低靜態功耗、簡化電路的趨勢。
    本論文旨在開發常關型p通道之氮化鎵金氧半場效電晶體,優化p通道元件的歐姆接觸特性,透過製程上的調整,探討出最適合的製備條件和實驗參數。在製備流程中,採用自對準閘極蝕刻技術,搭配適當的蝕刻時間,成功使p通道元件操作在增強模式。
    閘極氧化層的加入有效抑制了漏電流的產生,減少漏電途徑,相對於沒有氧化層的蕭特基型元件,有更出色的性能表現。另外,我們藉由製備流程中的一些特殊處理,可以進一步提升元件性能,如能夠修復蝕刻後損傷、改善元件缺陷的表面處理;透過浸泡稀鹽酸溶液去除原生氧化物,獲得更好的歐姆接觸特性。
    本論文成功研製出的常關型p通道之氮化鎵場效電晶體的性能如下:在歐姆接觸特性方面,接觸電阻為 59.3 Ω•mm,特徵接觸電阻為4.62×10-4 Ω•cm²。在元件三端特性中,當閘極電壓施加 -5 V時,最大飽和電流密度達到 -1.15 mA/mm,有效導通電阻為 9.95 kΩ•mm;閾值電壓為 -2.16 V,最大轉導值達到0.92 mS/mm,電流開關比為 3.11×103;閘極漏電流為 2.43×10-4 mA/mm,另外當VG < -5V,漏電流無明顯上升趨勢。

    To achieve integration with GaN power switching devices and eliminate parasitic inductance between chips, the development of GaN complementary metal-oxide-semiconductor (CMOS) is highly emphasized. Among these, the fabrication of p-channel GaN field-effect transistors (p-FETs) is the most challenging. In addition to matching the electrical characteristics with n-channel devices, it is also necessary to realize enhancement-mode devices to meet the trend of reducing static power consumption and simplifying circuit design.
    This thesis aims to develop normally-off p-channel GaN MOSFETs and optimize the ohmic contact characteristics of p-channel devices. Through process adjustments, the most suitable fabrication conditions and experimental parameters are investigated. During the fabrication process, a self-aligned gate etching technique is employed, along with appropriate etching times, successfully enabling the p-channel devices to operate in enhancement mode
    The incorporation of a gate oxide layer effectively suppresses leakage current, reducing leakage pathways and resulting in superior performance compared to Schottky-type devices without an oxide layer. Additionally, we can further enhance device performance through special treatments during the fabrication process, such as surface treatments that can repair etching damage and improve device defects. By soaking in a dilute hydrochloric acid solution to remove native oxides, better ohmic contact characteristics can be achieved.
    The normally-off p-channel GaN field-effect transistor successfully developed in this thesis exhibits the following performance characteristics: In terms of ohmic contact properties, the contact resistance is 59.3 Ω•mm, and the specific contact resistance is 4.62×10-4 Ω•cm2. For the device's three-terminal characteristics, when the gate voltage is -5 V, the maximum saturation current density reaches -1.15 mA/mm, and the effective on-resistance is 9.95 kΩ•mm. The threshold voltage is -2.16 V, the maximum transconductance is 0.92 mS/mm, and the current on/off ratio is 3.11×103. The gate leakage current is 2.43×10-4 mA/mm, and additionally, when VG < -5 V, there is no significant increase in leakage current.

    中文摘要 I Abstract III 誌謝 VI Contents XI List of Tables XV List of Figures XVII Chapter 1 Introduction 1 1-1 Background 1 1-2 Motivation 6 1-3 Organization 10 Chapter 2 Basic Theory 12 2-1 GaN-Based Semiconductors 12 2-1-1 Material Properties 12 2-1-2 Spontaneous Polarization 14 2-1-3 Piezoelectric Polarization 16 2-1-4 2DEG(2DHG) Formation 19 2-2 GaN-Based p-FETs 21 2-2-1 Mg-Doped p-GaN Layer 21 2-2-2 Metal-Semiconductor Heterojunction 25 2-2-3 Self-Aligned p-FETs 28 2-2-4 Annealing 30 Chapter 3 Experiments 34 3-1 Experimental Equipment 34 3-1-1 Deionized Water System 34 3-1-2 Ultrasonic Cleaner 35 3-1-3 Mask Aligner 36 3-1-4 Spin Coater 37 3-1-5 Oven 38 3-1-6 Electron Beam Evaporator 39 3-1-7 Hot Plate 40 3-1-8 Rapid Thermal Annealing System 41 3-1-9 ICP-RIE System 42 3-3-10 Atomic Layer Deposition System 43 3-1-11 Semiconductor Analyzer 44 3-1-12 Alpha Step 45 3-1-13 Focused Ion Beam System 46 3-1-14 Transmission Electron Microscopy 47 3-1-15 Energy-dispersive X-ray spectroscopy 49 3-2 Device fabrication 50 3-2-1 Epitaxial Structure 50 3-2-2 GaN p-FETs Process 51 3-2-3 Schematic Procedures 60 Chapter 4 Results and Discussion 64 4-1 Physical property analysis 64 4-1-1 Transmission Electron Microscopy 64 4-1-2 Energy-Dispersive X-ray Spectroscopy 66 4-2 Electrical Characterization 70 4-2-1 TLM Analysis 70 4-2-2 Output Characteristics 81 4-2-3 Transfer Characteristics 87 4-2-4 Gate Leakage Current 95 Chapter 5 Conclusion 99 Chapter 6 Future Work 101 References 102

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