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研究生：	王崇銘 Wang, Chung-Ming
論文名稱：	應用環型振盪器於積體電路量產測試方法之研究 Application of Ring Oscillator Technique in IC Production Line Testing
指導教授：	洪茂峰 Houng, Mau-Phon
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系碩士在職專班 Department of Electrical Engineering (on the job class)
論文出版年：	2010
畢業學年度：	98
語文別：	英文
論文頁數：	42
中文關鍵詞：	環型振盪器、量產測試、製程變異
外文關鍵詞：	Ring Oscillator, production test, process variation
相關次數：	點閱：66 下載：0
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環型振盪器常內建在CMOS積體電路，並以其輸出頻率來觀察製程中所造成的變異。本論文中，我們應用此環型振盪器，來改善量產測試中，容易受到製程漂移影響項目的測試方法。
首先是IC的動態電流測試。此電流的測試規格可隨著環型振盪器的頻率而改變，並應用此一方法將有潛在缺陷的晶片測出，來改善測試的品質。
DDRII的ODT(on die termination)電阻值，易受製程漂移而變動。在量產測試中，需搜尋到對應的碼來設定數位補償電路(digital compensation)來達到原先所設定的電阻值，此搜尋過程需耗時較久。應用環型振盪器對製程變異敏感的特性，我們可先預估對應的碼，來降低搜尋的次數以達到節省測試時間的需求。

The ring oscillator is usually built within the CMOS IC, and its output frequency is used to observe the variation caused by manufacturing process. In this thesis, we apply the ring oscillator to improve the production test item which is easy affected by process drift.
Firstly, the test of IC dynamic current. The test specification of this current can be varied with ring oscillator frequency. By applying this method, some potentially defective dies are screened out to improve test quality.
The resistance value of DDRII ODT circuit is easy varied by process drift.In production test, it is necessary to search the corresponding code to set digital compensation circuit to have the required resistance value. This search procedure takes longer test time. Application of ring oscillators on the characteristics of process variation sensitive, we can first estimate the corresponding code. It can reduce the number of searches in order to achieve savings of test time requirements.

Chapter 1.Introduction.....................................1
1 Introduction...........................................1
2 Motivation.............................................2
3 Thesis Organization....................................2
Chapter 2.Ring Oscillator Theory...........................3
1 Oscillator Theory......................................3
2 CMOS inverter Rin Oscillator...........................4
3 Relationship between Rgate, Cgate and frequency of Ring Oscillator.................................................6
Chapter 3.Real ring oscillator design in nanometer process.8
1 Introduction...........................................8
2 Measure frequency of Ring Oscillator in production test......................................................12
3 The correlation between different Vt cell Ring oscillator and Corner wafer...............................16
Chapter 4.Apply Ring Oscillator in Dynamic IDD current test......................................................21
1 Introduction..........................................21
2 CMOS IDD testing......................................22
3 Analysis the correlation between IDD and Ring Oscillator................................................25
4 Evaluation............................................27
Chapter 5.Apply Ring Oscillator in DDRII ODT termination resistor test.............................................31
1 Introduction..........................................31
2 ODT (On Die Termination) calibration method...........32
3 Analysis the correlation between ODT impedance and Ring Oscillator................................................35
4 Evaluation............................................37
Chapter 6.Conclusion and Future work......................39
1 Conclusion............................................39
2 Future work...........................................40
References:...............................................41

                                    

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[3] Bhushan, M.; Gattiker, A.; Ketchen, M.B.; Das, K.K.; , "Ring oscillators for CMOS process tuning and variability control" Semiconductor Manufacturing, IEEE Transactions on , vol.19, no.1, pp. 10- 18, Feb. 2006

[4] B.Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2002

[5] Makki, R.Z.; Shyang-Tai Su; Nagle, T.; , "Transient power supply current testing of digital CMOS circuits" Test Conference, 1995. Proceedings., International , pp.892-901, 21-25 Oct 1995

[6] Vladislav Nagy — Viera Stopjakov´:”ACCURATE DYNAMIC IDD TESTING AND LOCALIZATION OF DEFECTIVE PARTS IN MIXED–SIGNAL CIRCUITS ” Journal of ELECTRICAL ENGINEERING, vol.58, no.1, pp. 26- 32 ,2007

[7] Soft Test Inc. “The Fundamentals of Digital Semiconductor Testing”

[8]Verigy LTD,”Verigy V93000 Document”.

[9] Murata, T.; Sato, M.; Tsuguo Goto; , "Reduction of wafer edge induced defect by WEE optimization" Semiconductor Manufacturing, 2007. ISSM 2007. International Symposium on , pp.1-3, 15-17 Oct. 2007

[10] Harry Veendrick, Deep-Submicron CMOS ICs, Kluwer -Deventer

[11] Rambus Inc.,” On Die Termination (ODT) Calibration”.

[12] Yongping Fan; Smith, J.E.; , "On-die termination resistors with analog impedance control for standard CMOS technology" Solid-State Circuits, IEEE Journal of , vol.38, no.2, pp. 361- 364, Feb 2003

校內：2020-12-31公開
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