本論文以五苯環有機薄膜電晶體為基礎，導入一高分子薄膜當作電荷捕捉層，結合高介電係數材料氧化鉿薄膜作為其絕緣層，製作成可低操作電壓的有機非揮發性記憶元件。其中使用四種高分子材料，包括聚乙烯醇（Poly(vinyl alcohol), PVA）、交聯結合的poly（4-vinylphenol）（C-PVP）、聚苯乙烯（Polystyrene, PS）與聚甲基丙烯酸甲酯（Polymethylmethacrylate, PMMA），皆利用溶液旋轉塗佈方式於氧化鉿表面製作薄膜，進而探討四種不同電荷捕捉層對記憶元件的影響，包括寫入/清除速度、記憶窗口、記憶保持能力、與耐久性。當寫入時間較長時，使用PVA當作電荷捕捉層時，其記憶窗口為四種元件中最大，約3.46 V；此外，從原子力顯微鏡圖上發現到PVA薄膜與成長於它之上的五苯環薄膜，其表面相當的粗糙，從表面能上也發現到兩者相當的不匹配，因而推論造成有較多的陷阱能態能捕捉電荷，進而增大其記憶窗口，但PVA薄膜相當的薄，因此對於記憶保持能力與耐久性來說，表現較為不佳。綜合所有能力而言，四種不同電荷捕捉層中最佳的為PMMA，其記憶窗口在經過20 V/1 ms的寫入速度下就有2.41 V的表現，對記憶保持能力而言，經過103 s後，其記憶窗口也只降至原本的81 ％；重複操作元件40 次後，其記憶窗口並無多大變化，有較佳的耐久性表現。
最後本研究成功利用低溫（＜200 ℃）、簡單化與成本低廉的製程方式製作出低操作電壓（< 25 V）的有機記憶元件。此外，本研究也進行元件的耐久性試驗，在重複操作40 次後，其記憶窗口變化不大，證明本研究所製作的有機記憶元件擁有優良的耐久能力。

We investigated organic non-volatile memory devices that are operated at low-voltage and are based on organic thin-film transistors (OTFTs) with pentacene as an active layer. Hafnium dioxide (HfO2) was used as the main gate dielectric to reduce operation voltage. Four kinds of polymer materials were used as the charge trapping layer, which was created via a spin-coating process on the HfO2 layer. The four kinds of polymer materials that were employed included poly(vinyl alcohol) (PVA), cross-linked poly(4-vinylphenol) (C-PVP), polystyrene (PS), and polymethylmethacrylate (PMMA). The electrical characteristics of the organic non-volatile memory devices, including memory window, program/erase speed, retention, and endurance, were also discussed.
We studied the influence of the surface properties of polymer charge trapping layers on the morphology of pentacene films and the electrical characteristics of the corresponding memory devices. When PVA was used as the charge trapping layer, the memory window of the device was the largest (i.e., 3.46 V) as compared to the memory windows when using the other polymer layers. Atomic force microscopy measurements indicate that the surface morphologies of PVA and the pentacene layer on PVA both exhibited a relatively high amount of surface roughness. Moreover, a large difference in surface energy was observed between the pentacene layer and the PVA surface. As a consequence, we suggest the possibility of a considerable amount of trap states in the pentacene/PVA interface, thereby causing a large threshold voltage shift in the device. Compared with other organic non-volatile memory devices, the device with the PMMA charge trapping layer shows superior electrical characteristics. Specifically, the device with PMMA has a 2.41 V memory window after a 20 V program operation for 1 sec, and approximately 81% of the memory window still remains after 103 sec. Additionally, good endurance properties were also observed after 40 program/erase cycles.
In conclusion, we have demonstrated a simple and inexpensive approach for the low-temperature fabrication (＜200 ℃) of low-voltage operated (< 25 V) organic non-volatile memory devices with polymer charge trapping layers. These devices also show excellent endurance properties after multiple program/erase cycles.

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