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研究生: 陳奕豪
Chen, Yi-Hao
論文名稱: 利用新穎摻雜方法製備矽元件及其在3D整合應用
A Novel Doping Method of Silicon Devices and Their Application for 3D Integration
指導教授: 張守進
Chang, Shoou-Jinn
學位類別: 博士
Doctor
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics
論文出版年: 2016
畢業學年度: 104
語文別: 英文
論文頁數: 126
中文關鍵詞: 熱燈絲化學氣相沉積矽穿孔金氧半場效電晶體光感測器
外文關鍵詞: HWCVD, TSV, MOSFET, Photo sensor
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  • 本論文主要著重在藉由新穎的摻雜技術研製矽元件,包含熱燈絲佈植摻雜、感應耦合電漿(ICP)輔助熱燈絲佈植摻雜技術,並應用於3D整合。
    首先,我們成功應用熱燈絲佈植摻雜技術製作金氧半場效電晶體(MOSFETs),以歐傑電子能譜儀分析摻雜在電晶體的磷 (P) 原子顯示出其接面深度近似~80 nm,而經由霍爾量測結果顯示及其摻雜入矽晶圓呈現N型半導體,其磷(P)原子的摻雜載子濃度近似為~5.83 × 1020 cm−3。對於MOSFET元件,實驗量測結果顯示出,汲極電流-汲極電壓(ID-VD)得到一個好的轉換特性。電晶體顯示出標準飽和及夾止的特性,這顯示柵極金屬可以完全空乏整個通道。另外,此熱燈絲摻雜佈植技術亦可應用在薄膜電晶體 (TFT)。
    另一方面,我們也成功利用感應耦合電漿(ICP) 輔助熱燈絲摻雜佈植技術研製了P型以及N型金氧半場效電晶體(MOSFETs),且我們藉由P型以及N型金氧半場效電晶體的結合,研製出互補式金屬氧化物半導體(CMOS)元件。在P型金氧半場效電晶體的量測結果顯示出好的轉換特性,分析摻雜硼 (B) 原子在電晶體中的接面深度近似~ 45 nm,此外電晶體的次臨界擺幅和電流開關比分別為0.18 V/decade和大於104 ; 另一方面在互補式金屬氧化物電晶體量測結果顯示出具備好的反相器特性。
    在單晶矽太陽能電池的部分,同時成功證明出藉由感應耦合電漿(ICP) 輔助熱燈絲佈植摻雜技術可研製單晶矽太陽能電池。在藉由感應耦合電漿(ICP) 輔助熱燈絲佈植摻雜技術,以歐傑電子能譜儀分析摻雜在太陽能電池的磷 (P) 原子,顯示出其接面深度近似~70 nm,而我們經由霍爾量測結果顯示其摻雜入矽晶圓的太陽能電池呈現N型半導體,其磷(P)原子的摻雜載子濃度近似為~9.34 × 1020 cm−3。另外,以粗糙化和氮化矽當抗反射層的單晶矽太陽能電池,其元件具有高的轉換效率16.08%. 此外,同時藉由感應耦合電漿(ICP) 輔助熱燈絲佈植摻雜研製出n型金氧半場效電晶體,其量測結果呈現出良好的次臨界擺幅0.39 V/decade、電流開關比大於104。
    另外一方面,在3D整合的部份我們成功以矽穿孔 (TSV) 技術研製3D 氧化鋅奈米線紫外光檢測器。在矽穿孔的直徑與深度分別約為80μm 與170 μm ,而在矽穿孔 (TSV) 電鍍銅方面,藉由SEM影像可發現銅均勻的填入每一個矽穿孔 (TSV) 中,在矽穿孔 (TSV) 電性量測方面顯示出單一根的平均阻抗大約為0.9 mΩ. 對於3D的氧化鋅奈米線紫外光檢測器,在紫外光照射下量測其光電流約〜1秒的時間常數迅速增加,其開 - 關電流比大於104。
    最後,為了進一步整合氧化鋅奈米線與金氧半場效電晶體,我們順利以矽穿孔(TSV)技術來製備3D 智慧型光感測器,所量測到金氧半場效電晶體藉由熱燈絲佈植摻雜技術,可獲得標準的飽和與夾止的特性。此外,在3D氧化鋅奈米線/ MOSFET智慧型光感測器,在紫外光照射下具有穩定的動態響應和穩定的再現性,其光暗電流特性亦呈現出大的光響應和快速的反應,且開-關電流對比大於十倍以上,而實驗顯示出當關掉紫外光照射,其衰減時間低於1秒,該結果顯示出智慧型3D氧化鋅奈米線/ MOSFET光感測器的衰減時間比傳統的氧化鋅奈米線的光感測器還要短,反應更迅速。

    The main goal of this dissertation is to fabricate Si-based devices through novel doping techniques, including hot-wire ion implantation doping (HWID) and inductively coupled plasma (ICP)-assisted HWID (IHWID), and their application for 3D integration.
    First, we fabricated a silicon metal–oxide–semiconductor field-effect transistor (MOSFET) by a HWID technique. Based on Auger electron spectroscopy, the junction depth of the phosphorus was determined as ∼80 nm. The carrier concentration of the phosphorus was ∼5.83×1020 cm−3, as determined from room-temperature Hall measurements. The drain current–drain voltage (ID–VD) characteristics of the MOSFET device were measured in the dark by experimental methods. The transistor exhibited standard saturation and pinch-off characteristics, indicating that the entire channel region under the gate metal could be completely depleted. This technique was also found to be applicable to thin-film transistors.
    Next, we fabricated p-type and n-type MOSFETs using an IHWID technique. A complementary metal-oxide-semiconductor (CMOS) device that combines p-MOSFETs and n-MOSFETs was also fabricated. The obtained junction depth of the p-MOSFETs was approximately 45 nm. The subthreshold slope and on/off current ratio of the p-MOSFET were about 0.18 V/decade and over 104, respectively. Measurements of the CMOS device show that it is a good inverter.
    Then, we fabricated c-Si solar cells by IHWID. The junction depth obtained was approximately 70 nm and the carrier concentration of the phosphorus was approximately 9.34×1020 cm−3. The efficiency of the fabricated SiNx/textured c-Si photovoltaic device was 16.08%. IHWID was also utilized to prepare Si n-MOSFETs. The subthreshold slope and on/off current ratio of the Si n-MOSFETs from experimental results were about 0.39 V/decade and over 104, respectively.
    Additionally, we prepared a ZnO nanowire photodetector using 3D through-silicon via (TSV) technology. The diameter and depth of the Si via were approximately 80 μm and 170 μm, respectively. Cu uniformly filled in each TSV, which has an average resistance of about 0.9 mΩ. The photocurrent of the 3D ZnO nanowire photodetector increased rapidly with ultraviolet (UV) excitation, at a time constant of about ~1 s. The on/off current ratio was about 104.
    Finally, we further integrated the ZnO nanowires with MOSFET, successfully fabricating a 3D ZnO-nanowire/MOSFET smart photo sensor using through-silicon via (TSV) technology. The MOSFET, prepared by hot-wire chemical vapor deposition, exhibited standard saturation and pinch-off characteristics. The dynamic response of the 3D ZnO-nanowire/MOSFET smart photo sensor was stable and reproducible with an on/off current contrast ratio greater than one order of magnitude. The decay time as we turned off the UV illumination was less than 1 sec for the 3D ZnO-nanowire/MOSFET smart photo sensor, which was significantly shorter than that observed from a conventional ZnO nanowire photo sensor.

    摘要 I Abstract IV Acknowledgments VII Content VIII Figure Captions XII Table Captions XVI Chapter 1. Introduction 1 1.1. Background and motivation 1 1.2. Overview of doping techniques 3 1.3. Overview of Through-Silicon Via (TSV) 5 1.4. Overview of Crystalline Silicon (c-Si) Solar Cell 6 1.5. Organization of Dissertation 6 Chapter 2. Experimental equipment and relevant theory 10 2.1. Impurity doping by Hot wire Chemical Vapor Deposition 10 2.2. Through Silicon Via by Deep reactive ion etching 12 2.3. Cu and Ag-Sn by Electroplating method 14 2.4. Growth of nanowires by Vapor-Liquid-Solid method 15 2.5. Important Parameters 16 2.5.1. Field-Effect Mobility 16 2.5.2. Threshold Voltage (VT) 17 2.5.3. On/off Current Ratio (Ion/off) 17 2.5.4. Subthreshold Swing (S.S) 17 2.5.5. Gate Electrode Work Function 18 Chapter 3. Si-Based MOSFET and Thin Film Transistor Prepared via Hot Wire Implantation Doping Technique 23 3.1. Fabrication of n-MOSFETs by Hot wire implantation doping technique 24 3.2. Hot wire implantation doping technique and analysis 25 3.3. Characteristics of n-MOSFET and Thin Film Transistor 27 Chapter 4. p-MOSFET and n-MOSFET prepared by ICP-assisted hot wire implantation doping technique 38 4.1. Fabrication of p-MOSFETs 39 4.2. ICP-assisted Hot wire implantation doping technique and analysis 40 4.3. p-MOSFETs with ICP-assisted Hot wire implantation doping technique 41 4.4. n-MOSFETs and CMOS with ICP-assisted Hot wire implantation doping technique 43 Chapter 5. c-Si solar cells and Si n-MOSFETs prepared by ICP assisted hot wire implantation doping 54 5.1. Fabrication of Crystalline Silicon (c-Si) Solar Cells 55 5.2. ICP-assisted Hot wire implantation doping analysis of Crystalline Silicon (c-Si) Solar Cells 57 5.3. Electrical Properties of the Crystalline Silicon (c-Si) Solar Cells 58 5.4. Electrical Properties of the hybrid n-MOSFETs and Crystalline Silicon (c-Si) Solar Cells 59 Chapter 6. Three-dimensional structure and Photosensitivity Characteristics of ZnO nanowires Photo sensors 72 6.1. Three-dimensional ZnO nanostructure Photodetector prepared with Through Silicon Via technology 73 6.1.1 Fabrication of 3D ZnO nanostructure Photodetector 73 6.1.2 Cu and Ag-Sn plating of the TSV 75 6.1.3 Physical Properties of the ZnO nanowires 75 6.1.4 Characteristics of ZnO nanowires photodetector with TSV….. 76 6.2. Three-dimensional ZnO nanowires Smart Photo Sensors prepared with Through Silicon Via technology 78 6.2.1 Fabrication of 3D ZnO nanowires Smart Photo Sensors 80 6.2.2 Physical Properties of the Cu and Ag-Sn with TSV 82 6.2.3 Physical Properties of the ZnO nanowires with Ag-Sn 83 6.2.4 Characteristics of n-MOSFETs in the Dark 83 6.2.5 Characteristics of n-MOSFETs with ZnO nanowires under Illumination 85 Chapter 7. Conclusion and Future work 103 7.1. Conclusion 103 7.2. Future Work 105 Reference 107 References in chapter 1 107 References in chapter 2 112 References in chapter 3 116 References in chapter 4 118 References in chapter 5 120 References in chapter 6 121

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