簡易檢索 / 詳目顯示

研究生: 徐文禮
Hsu, Wen-Li
論文名稱: 晶圓薄化研究
Research on Wafer Thinning
指導教授: 周榮華
Chou, Jung-Hua
學位類別: 碩士
Master
系所名稱: 工學院 - 工程科學系碩士在職專班
Department of Engineering Science (on the job class)
論文出版年: 2011
畢業學年度: 99
語文別: 中文
論文頁數: 74
中文關鍵詞: 晶圓平坦度Die StrengthDie Crack
外文關鍵詞: wafer, flatness, Die Strength, Die Crack
相關次數: 點閱:152下載:25
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 隨著晶片3D堆疊 (3D-Stacked Die)技術的蓬勃發展,為了在有限的空間裡,讓系統功能極大化,晶圓(Wafer)的薄化面臨更大的挑戰。由於晶圓尺寸從8吋(8 inch)提升到12吋(12 inch) ,故在封裝製程的研磨中,晶圓(Wafer)的平坦度(Flatness)及表面應力分佈將面臨更嚴苛的挑戰。若製程上控制不當則易造成破片(Breaking),導致IC元件損壞及嚴重的成本損失。本次研究主要是針對現有的設備,在第一站研磨站就提升Die Strength ,以降低後製程所產生的Die Crack 。藉由研磨機工作台轉速與主軸轉速及進給速率,三者關係互相組合,找出對Die Strength 最大化的組合。此次利用的工具為田口實驗,藉由田口找出最佳化的組合。

    With the 3D stacking packages (3D-Stacked Die) rapidly progressed and the need to utilize the limited space, maximize the system function, the wafer thinning will face even greater challenges. As wafer sizes increase from 8 inches to 12 inches , in grinding process, the wafer flatness and surface stress distribution will face more severe challenges . If inadequate control of the manufacturing process occurs, it is easy to cause fragmentation, IC component damage and lead to serious cost losses. This study focuses on existing factory equipment, the first station grinding station to enhance die strength, and to reduce post process resulted from die crack. Die strength is maximized by examining the grinding machine table speed ,the spindle speed the feed rate, and the relationship among each combination. Through the Taguchi experiment, the optimal combination of process condition is obtained.

    中文摘要 -----------------------------------------------I Abstract ----------------------------------------------II 誌謝---------------------------------------------------III 目錄 --------------------------------------------------IV 圖目錄 -------------------------------------------------VI 表目錄 -------------------------------------------------IX 第一章 緒論 1.1 前言 ------------------------------------------1 1.2 研究動機及目的 ------------------------------------2 1.3 Flash Memory Card應用及演進 ----------------------3 1.4 文獻回顧 ----------------------------------------16 第二章 3D封裝製程 2.1 封裝型態------------------------------------------21 2.2 3D IC 封裝製程介紹 -------------------------------28 2.3 研磨製程 -----------------------------------------37 第三章 研究設計與方法 3.1 設計方法與流程-----------------------------------43 3.2 實驗機台與材料條件--------------------------------43 3.3 收集資料與結果檢測 -------------------------------47 第四章 田口氏品質工程分析 4.1 田口品質設計法之實驗設計---------------------------49 4.2 實驗結果-----------------------------------------52 4.3 變異分析 ----------------------------------------58 4.4 確認實驗-----------------------------------------60 第五章 結論與未來研究方向 5.1 結論--------------------------------------------67 5.2 未來研究方向 ------------------------------------68 參考文獻---------------------------------------------69 名詞縮寫之全文對照-------------------------------------73

    [1]李輝煌編著,”田口方法-品質設計的原理與實務”,國立成功
    大學工程科學系,(2000).

    [2]劉春松,”Flash Memory Card的演進及發展”,(2006).

    [3] www.pqi.com.tw ,勁永國際股份有限公司,(2011).

    [4] www.gigantek.com.tw ,閎發科技股份有限公司,(2011).

    [5] www.transcend.com.tw ,創見科技股份有限公司,(2011).

    [6] www.sony.com.tw ,SONY,(2011).

    [7] www.sdcard.org ,SD Association,(2011).

    [8] www.yuanyu.tw ,元佑實業,(2011).

    [9] www.sandisk.com ,Sandisk,(2011).

    [10] www.kingston.com/taiwan ,金士頓科技公司,(2011).

    [11] www.samsung.com ,Samsung Semiconductor,(2009).

    [12]Chidambaram, S., Pei, Z.J, Kassir, S., ”Fine grinding
    of silicon wafer:a mathematical model for grinding
    marks, ”International Journal of Machine Tools&
    Manufacture,Vol.43, pp.1592-1602,(2003).

    [13]Zhou, L.B., Eda, H., Shimizu, J.,“State-of-the-art
    technologies and kinematical analysis for the one-stop
    finishing of Φ300 mm Si wafer,”Journal of Material
    Processing Technology, Vol.129, pp.34-40,(2002).

    [14]Zhou, L., Shimizu, J., Shinohara, K., Eda, H.,
    “Three-dimension kinematical analyses for surface
    grinding of large scale substrate,” Precision
    Engineering, Vol.27, pp.175-184,(2003).

    [15]Pei, Z.J., Strasbaugh, A.,“Fine grinding of silicon
    wafers,”International Journal of Machine Tools &
    Manufacture, Vol.41, pp.659–672,(2001).

    [16]Pei, Z.J., ”A study on surface grinding of 300 mm
    silicon wafers,”International Journal of Machine Tools
    & Manufacture,Vol.42, pp.385–393,(2002).

    [17]Pei, Z.J., Strasbaugh, A.,“Fine grinding of silicon
    wafers: designed experiments, International Journal of
    Machine Tools & Manufacture, Vol.42, pp.395–404,(2002).

    [18]Huang, H., Yin, L., Zhou, L.,“High speed grinding
    of silicon nitride with resin bond diamond wheels,”
    Journal of Materials Processing Technology,Vol.141,
    pp.329–336,(2003).

    [19]Steve, K., “Grinding Technology”, Delmar Publishers,
    2nd Edition,(1994).

    [20]Pei,Z.J.,Billingsley, S.R.,Miura,S.,“Grinding
    Induced Subsurface Cracks in Silicon Wafers”,
    International Journal of Machine Tools & Manufacture,
    Vol.39, pp.1103,(1999).

    [21]Pei, Z. J., Alan, S.,“Fine grinding of silicon wafers”,
    International Journal of Machine Tools & Manufacture,
    Vol.41, pp.659 (2001).

    [22] Pei, Z. J.,“A Study on Surface Grinding of 300
    mm Silicon Wafers”, International Journal of Machine
    Tools & Manufacture, Vol.42, pp.385,(2002).

    [23]Pei, Z. J., Alan, S.,“Fine Grinding of Silicon
    Wafers: Designed Experiments”,International Journal
    of Machine Tools & Manufacture, Vol.42, pp.395,(2002).

    [24]Chidambaram, S., Pei, Z. J., Kassir, S.,“Fine Grinding
    of Silicon Wafers: a Mathematical Model for the Chuck
    Shape”, International Journal of Machine Tools &
    Manufacture, Vol.43,pp.739,(2003).

    [25]Chidambaram, S., Pei, Z. J., Kassir, S., “Fine Grinding
    of Silicon Wafers: a Mathematical Model for Grinding
    Marks”, International Journal of Machine Tools &
    Manufacture, Vol.43, pp.1595,(2003).

    [26]Sun, W., Pei, Z. J., Fisher, G. R., “Fine Grinding of
    Silicon Wafers: a Mathematical Model for the Wafer
    Shape”, International Journal of Machine Tools &
    Manufacture, Vol. 44, pp.707,(2004).

    [27]Sun, W., Pei, Z. J., Fisher, G. R., “Fine Grinding of
    Silicon Wafers: Machine Configurations for Spindle
    Angle Adjustments”, International Journal of
    Machine Tools & Manufacture, Vol.45,pp.51,(2005).

    [28]Sun, W., Pei, Z. J., Fisher, G. R., “Fine Grinding of
    Silicon Wafers: Effects of Chuck Shape on Grinding
    Marks”, International Journal of Machine Tools &
    Manufacture, Vol. 45, pp.673,(2005).

    [29]Chen, C.-C. A., Hsu, L. S., “3D Geometric Model of
    Wafer Shape for Diamond Grinding of Silicon Wafers”,
    Journal of the Chinese Society of Mechanical Engineers,
    Vol.27, No.1,pp.123,(2006).

    [30]Chen, C.-C. A., Hsu, L. S.,“Estimating Total Thickness
    Variation of Wafer Grinding Process for Die
    Application”, Key Engineering Materials, Publishing
    Accepted,(2007).

    [31]Chen, C.-C. A., Hsu, L. S., “A Process Model of Wafer
    Thinning by Diamond Grinding”, Journal of
    Manufacturing Processing Technology, Publishing
    Accepted,Vol.201, pp.606-611,(2008).

    [32]黃弘毅,”矽晶圓超精密輪磨之研究”,國立台灣大學碩士論
    文,(2003).

    [33]許厲生,”矽晶圓薄化與平坦化加工研究”,國立台灣科技大
    學博士論文,(2007).

    [34]馬金汝,楊清旭,”新式堆疊封裝結構之熱傳模擬分析”,日
    月光半導體股份有限公司,(2011).

    [35]楊春財,”應用田口方法探討Tri-Tier Bond Pith 25μm之銲
    線製程最佳化參數”,國立成功大學碩士論文,(2004).

    [36]Fully Automatic DGP8760 Grinder/Polisher(Dry Polish),
    Maintenance Manual,(2009).

    下載圖示
    2013-08-26公開
    QR CODE