本文主要利用有限元素分析軟體ANSYS17.0 Workbench來模擬覆晶細間距球柵陣列封裝FCFBGA構裝體搭配銅柱凸塊(Copper Pillar Bump)於加速溫度循環中的熱應變行為與凸塊焊錫(Sn3.5Ag)的疲勞壽命。
在本模擬中，首先利用ANSYS Workbench建立模型接著設定各元件材料參數。由於凸塊焊錫與底部錫球為非線性黏塑材料，因此以Anand’s model來描述其黏塑性行為，而封膠與底膠為黏彈性材料，則用Maxell model描述其變化，其他材料視為彈性材料以提高求解效率。接著將其網格化後設定邊界條件並施加溫度循環負載於構裝體上。最後觀察構裝體的應變分布以及凸塊焊錫在溫度循環過程中的等效塑性應變變化(Equivalent plastic strain range)，並將結果代入Coffin-Manson疲勞壽命預測公式來探討凸塊焊錫的可靠度。
在結果與討論主要為熱應變分析，主要探討凸塊焊錫(Sn3.5Ag)的分析結果。首先觀察各個凸塊焊錫(Sn3.5Ag)的等效塑性應變分布，找出發生最大等效塑性應變的關鍵凸塊，再分析關鍵凸塊於熱負載過程中應變的變化，藉由Coffin-Manson equation，計算出凸塊焊錫的疲勞壽命。接著經由改變多種不同類型組件的尺寸以及材料的熱膨脹係數，觀察其對疲勞壽命的影響。我們可以藉由分析結果得知哪些因素對FCFBGA焊帽疲勞壽命影響顯著。

This thesis uses finite element analysis software ANSYS17.0 Workbench to simulate the thermal strain behavior of the flip-chip fine-pitch ball grid array(FCFBGA) package structure with copper pillar bumps, and is studied the fatigue life of the bump solder (Sn3.5Ag) in the accelerated temperature cycle.
In the simulation, first ANSYS Workbench is used to set up the model and then set the parameters of each component's material. The solder bump and the bottom solder ball are nonlinear viscoplastic materials, while their viscoplastic behavior is described by Anand’s model. The mold compound and underfill are viscoelastic materials, and their viscoelastic behavior is described by Maxell model. Other materials are considered elastic materials to improve the efficiency of the solution. Then meshes it, sets the boundary conditions, and exerts a temperature cycle load to the body. Finally, observe the strain distribution of the structural body and substitute the results of the equivalent plastic strain change of the solder bump during temperature cycling into the Coffin Manson formula to investigate the reliability of the solder bump.
In the results and discussion, the effect on the fatigue life was observed by changing the dimensions of the different components and the CTE of the material. Finally, the variation in the size of bump's pitch and the CTE of underfill has a significant effect on the solder bump fatigue life.

[1] 邱美玲/譯, "先進半導體構裝用模封材料技術動向", 機械月刊第三十四卷第十期, P110-P122, October 2008.
[2] John H. Lau, “Recent Advances and New Trends in Flip Chip Technology”, Journal of Electronic Vol.138(3),2016.
[3] Tung, F., 2003, “Pillar Connections for Semiconductor Chips and Method of Manufacture,” U.S. Patent No. 6,578,754, filed Apr. 27, 2000 and issued June 17, 2003.
[4] Lau, J. H., and Pao, Y., 1997, Solder Joint Reliability of BGA, CSP, and Flip Chip Assemblies, McGraw-Hill, New York.
[5] Masazumi Amagai, “Characterization of chip scale packageing materials”, IEMT/IMC Symposium 2nd pp.216~223,1998.
[6] S. Wiese, A. Schubert, H. Walter, R. Dudek, F. Feustel, E. Meusel, and B. Michel, “Constitutive Behaviour of Lead-free Solders vs. Lead-Containing Solders-Experiments on Bulk Specimens and Flip-Chip Joints”, Electronic Components and Technology Conference, pp.890-902, 2001.
[7] Shin-Hua Chao, Chih-Ping Hung, Mark Chen, Youru Lee, Joey Huang, Golden Kaoa, Ding-Bang Luh. “An embedded trace FCCSP substrate without glass cloth”, MICROELECTRONICS RELIABILITY, Vol. 57, pp. 101-110
[8] 張勳承, “田口方法應用與覆晶構裝錫球的熱應力分析”, 碩士論文, 國
立成功大學, 2003.
[9] 林家帆, “覆晶球柵陣列組合體之熱機械行為分析”, 碩士論文, 國
立成功大學, 2013.
[10] Mark Gerber, Craig Beddingfield, Shawn O'Connor, Min Yoo, MinJae Lee, DaeByoung Kang, SungSu Park, Curtis Zwenger, Robert Darveaux, Robert Lanzone, KyungRok Park, “Next generation fine pitch Cu Pillar technology — Enabling next generation silicon nodes”, Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st ,pp.612-618,2011.
[11] Nusrat J. Chhanda, Jeffrey C. Suhling, Pradeep Lall, “Effects of moisture exposure on the mechanical behavior of flip chip underfills in microelectronic packaging”, IEEE Thermal and Thermomechanical Phenomena in Electronic Systems, pp.333-345,2014.
[12] T. Wang, F. Tung, L. Foo, “Studies on a novel flip-chip interconnect structure. Pillar bump”, Electronic Components and Technology Conference, 2001. Proceedings., 51st,pp.933-937,2001.
[13] N. E. Dowing, “Mechanical Behavior of Materials”, Prentice-Hall, N.J., 1993.
[14] L. Anand,“Constitutive Equation for The Rate-Dependent Deformation of Metals at Elevated Temperature”, Transactions of The ASME, Vol.104, pp.12-17, 1982.
[15] R. Darveaux, “Effect of simulation methodology on solder joint crack growth correlation”, IEEE Electronic Components and Technology Conference, pp. 1048-1058, 2000.
[16] M. Amagai, M. Watanabe , M. Omiya, K. Kishimoto, T. Shibuya, “Mechanical characterization of Sn–Ag-based lead-free solders”, Microelectronics Reliability, Vol.42, pp.951-966, 2002.
[17] J. Zhu, “Effects of Anchor Pads in Micro-Scale BGA”, IEEE Electronic Components and Technology Conference, pp. 1731-1736, 2000.
[18] B. Rodgers, B. Flood, J. Punch, F. Waldron, “Experimental Determinatioio and Finite Element Model Validation of the Anand Viscoplasticity Model Constants for SnAgCu”, IEEE Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro-Electronics and Micro-Systems, pp. 490 – 496, 2005.
[19] W.W. Lee, L.T. Nguyen, G.S. Selvaduray, “ Solder joint fatigue model: review and applicability to chip scale packages”, Microelectronics Reliability, Vol.40, pp.231-244, 2000.
[20] L.F. Coffin, Jr., “A Study of the Effects of Cyclic Thermal Stress on a Ductile Metal,” Trans. ASME, Vol. 76, pp. 931-950, 1954.
[21] S.S. Manson, “Behavior of Materials under Conditions of Thermal Stress,” Heat Transfer Symposium, University of Michigan Engineering Research Institute, pp. 9-57, 1953.
[22] H.D. Solomon, “Low-Cycle Fatigue of 60Sn/40Pb Solder”, ASTM Special Technical Publication, Philadelphia, Pa, USA, pp. 342-370, 1985.
[23] E.C. Cutiongco, S. Vaynman, M.E. Fine, and D.A. Jeannotte, “Isothermal Fatigue of 63Sn-37Pb Solder”, Journal of Electronic Packaging, Vol.112, pp.110-114, 1990.
[24] W. Engelmaier, “Fatigue Life of Leadless Chip Carrier Solder Joints During Power Cycling,” IEEE Transactions on Components, Hybrids and Manufacturing Technology, Vol. CHMT-6, No. 3, pp. 52-57, 1983.
[25] H.D. Solomon, “Fatigue of 60/40 Solder,” IEEE Transactions on Components, Hybrids and Manufacturing Technology, Vol. CHMT-9, No. 4, pp.423-431, 1986.
[26] J. P. Clech, “BGA, Flip-Chip and CSP Solder Joint Reliability: of the Importance of Model Validation”, InterPack, pp.112-121, 1999.
[27] J.H.L. Pang, P.T.H. Low, B.S. Xiong, “Lead-free 95.5Sn-3.8Ag-0.7Cu Solder Joint Reliability Analysis For Micro-BGA Assembly”, IEEE Thermal and Thermomechanical Phenomena in Electronic Systems, Vol.2, pp.131-136, 2004.
[28] T. Takahashi, S. Hioki, I. Shohji, O. Kamiya, “Fatigue Damage Evaluation by Surface Feature for Sn–3.5Ag and Sn–0.7Cu Solders”, Materials Transactions, Vol. 46, No. 11, pp. 2335-2343, 2005.
[29] C. Kanchanomai, Y. Miyashita, and Y. Mutoh, “Low-Cycle Fatigue Behavior of Sn-Ag, Sn-Ag-Cu, and Sn-Ag-Cu-Bi Lead-Free Solders”, Journal of ELECTRONIC MATERIALS, Vol. 31, No. 5, pp. 456-465, 2002.
[30] Temperature Cycling, “JESD22 A104-D”, JEDEC, 2009.
[31] Yong-Hyuk Kwon, Hee-Seon Bang, and Han-Sur Bang, “Viscoplasticity Behavior of a Solder Joint on a Drilled Cu Pillar Bump Under Thermal Cycling Using FEA”, Journal of Electronic Materials, Vol.46, Issue 2, pp 833–840,2007.
[32] Dominik Herkommer, Jeff Punch, Michael Reid, “A reliability model for SAC solder covering isothermal mechanical cycling and thermal cycling conditions”, Microelectronics Reliability, Vol.50, Issue 1, Pages 116-126,2010
[33] Zane E. Johnson , "A Compilation of Anand Parameters for Selected SnPb and Pb-free Solder Alloys"
[34] Lu, M., 2014, “Challenges and Opportunities in Advanced IC Packaging,” Chip Scale Rev., 18(2), pp. 5–8.
[35] M. Pei and J. Qu, “Constitutive Modeling of Lead-Free Solders” , IEEE Advanced Packaging Materials: Processes, Properties and Interfaces, pp.45-49, 2005.
[36] Chaosuan Kanchanomai, Yukio Miyashita, Yoshiharu Mutoh, “Low-Cycle Fatigue Behavior of Sn-Ag, Sn-Ag-Cu, and Sn-Ag-Cu-Bi Lead-Free Solders”, Journal of Electronic Materials, Volume 31, Issue 5, pp 456–465,2002.