鑽石砂輪表面含有人工鑽石，而印刷電路板上有許多反光點與凹洞，在應用陰影疊紋系統量測時，這些鑽石或反光點和凹洞會在條紋圖上造成錯誤的灰階，因此會造成表面形貌計算錯誤。在升溫量測時，由於系統會因為加熱膨脹產生不可預期的的變動，最後造成量測上的誤差。
本文使用臨界值法對四影像平均邊緣檢測的結果，用來區分條紋圖上的錯誤區域，並且計算包圍最大錯誤區域之矩形長跟寬，以決定適切斷開法與適切閉合法的結構元素大小對條紋圖錯誤區域做自動化偵補。相位展開錯誤的問題，可經由對相位移條紋圖或包裹相位圖做3x3中值濾波一次，使其能相位展開成功。此外在升溫量測時，利用校正片在不同溫度時，所量測到的量測值與標準值之間的誤差，本文使用一次最小平方法與立方樣條內插法擬合誤差，建立陰影疊紋升溫校正的程式，經過升溫測試的結果，立方樣條內插法校正後的誤差較一次最小平法來的小。

Grinding wheel surface has artificial diamonds and the printed circuit board contains many reflective spots and cavities on the surface. When using the shadow moiré system to measure the 3D surface profile of grinding wheel and printed circuit board, these diamonds, reflective spots and cavities lead to wrong gray level on phase-shifting patterns and result in error. When measuring specimen by shadow moiré system under heating condition, the system will produce unpredictable changes because of thermal expansion and cause measurement error.
In this paper, using edge detection for averaged image of the four fringe patterns and setting thresholds to distinguish erroneous areas in phase-shifting images. The structure element size of proper-opening and proper-closing to automate detection and patching of erroneous areas in phase-shifting Images is decided by the maximum erroneous area of bounding rectangle width and height. The error of unwrapping phase could be eliminated by using 3x3 median filter in phase-shifting patterns or wrapping phase and make it successfully. To get error of measured value and standard value in different temperature, calibration plate is measured. In this paper, using one order least squares method and cubic spline method to fit error of measured value and standard value to establish program of shadow moiré system calibration under heating condition. By testing, the error using cubic spline is smaller than using one order least squares.

1.Y. Kwon, S. Danyluk, L. Bucciarelli and J. P. Kalejs, “Residual Stress Measurement in Silicon Sheet By Shadow Moire Interferometry, ”Journal of Crystal Growth, V.82, No.1-2, pp.221-227, Jul 22-25, 1986.
2.R. C. Schwarz, “Determination of Out-of-Plane Displacements And The Initiation of Buckling In Composite Structural Elements, ”Experimental Techniques, V.12, No.1, pp.23-28, January, 1988.
3.R. Stiteler, I. C. Ume, “In-Process Board Warpage Measurement in a Lab Scale Wave Soldering Oven,”IEEE Transactions on Components, Packaging, And Manufacturing Technology, Part A, Vol.19, No.4, pp.562-569, December,1996.
4.R. Stiteler, I. C. Ume, “System for Real-Time Measurement of Thermally Induced PWB/PWA Warpage, ” Journal of Electronic Packaging, Vol.119, pp.1-7, March, 1997.
5.W. Chung; L. Wen, “Measurement of warpage of electronic packagings after machining by phase-shifting shadow moire method ” Source Proceedings of SPIE - The International Society for Optical Engineering, Vol. 4537, pp 20-24, 2001.
6.Y.A. Moreno, “Moire technique and measurement of vibrations”Proceedings of SPIE - The International Society for Optical Engineering, Vol.4419, pp 202-205, 2001.
7.S.P Cao., K.A. Ngoi, Y.F Song, L. Lim, “A new Moire method for industry on-line measurement” Source: Proceedings of SPIE - The International Society for Optical Engineering, Vol. 4317, pp 186-191, 2001.
8.W. Yinyan and H. Patrick, “Measurement of Thermally Induced Warpage of BGA Packages/Substrates Using Phase-Stepping Shadow Moire, ” IEEE/CPMT Electronic Packaging Technology Conference, pp.283-289, 1997.
9.W. Yinyan and H. Patrick, “On-line Measurement of Thermally Induced Warpage of BGAs with High Sensitivity Shadow Moire, ” The International Journal of Microcircuits and Electronic Packaging, Vol.23, No.2, pp.191-196, Second Quarter 1998.
10.Y. Polsky, W. Sutherlin, and I. Charles, “A Comparison of PWB Warpage Due to Simulated Infrared and Wave Soldering Processes, ” IEEE Transactions On Electronics Packaging Manufacturing, Vol.23, No.3, pp.191~199, July, 2000.
11.K. Verma, D. Columbus, B. Han and B. Chandran, “Real-Time Warpage Measurement of Electronic Components With Variable Sensitivity, ” Electronic Components and Technology Conference, IEEE, pp.975-980, 1998.
12.K. Verma, D. Columbus and B. Han, “Development of Real Time/Variable Sensitivity Warpage Measurement Technique and its Application to Plastic Ball Grid Array Package,” Transactions On Electronics Packaging Manufacturing, IEEE, Vol.22, No.1, pp.63-70, January 1999.
13.P. Geng, S. Cho, H. Hsiao and J. Kuchy, “Application of shadow moiré technique board level manufacturing technologies,” Electronic Components and Technology Conference, IEEE, pp.1816-1820, 2006.
14.陳志松, “應用光測力學在電子構裝之量測分析, ” 國立臺灣大學應用力學研究所碩士論文, 2000.
15.鄭仲豪, “應用相位移陰影疊紋量測高溫下晶圓的變形”,國立成功大學機械工程學系碩士論文, 2002。
16.莊佳橙, “應用自動化相位移陰影疊紋系統量測晶圓外型”,國立成功大學機械工程研究所碩士論文, 2003。
17.陳璟照, “應用陰影疊紋法量測電子元件的共面性與翹曲量”,國立成功大學機械工程研究所碩士論文,2008。
18.陳郁升, “應用陰影疊紋法量測砂輪和木材三維表面形貌”,國立成功大學機械工程研究所碩士論文,2009。
19.陳建祥, “應用影像處理於相移條紋圖像之偵錯及升溫取像研究”,國立成功大學機械工程研究所碩士論文,2011。
20.JEDEC STANDARD, “Coplanarity Test for Surface-Mount Semiconductor, ”2003.
21.JEDEC STANDARD,“High Temperature Package Warpage Measurement Methodology, ”2005.
22.楊韶綸, “條紋反射法之向量解析與應用”,國立成功大學機械工程研究所碩士論文,2007。
23.W.W.Macy,“Two-Dimensional Fringe-Pattern Analysis,”Applied Optics Vol.22 No.23,3898-3901,1983.
24.繆紹剛，“數位影像處理”，台灣培生教育出版股份有限公司，2003。
25.Thomas Klinger, “Image Processing with LabVIEW and IMAQ Vision”, Pretice Hall PTR,2003.