Graphene over the previous decade has proved to be a versatile material due to its high carrier mobility, flexibility and conductivity in applications in the nano- and the meso-scale. To translate these unique properties into applicable electronic devices a scalable, controllable, and powerful method for their fabrication has to be identified. Recently, the formation of a dielectric Poly(Propylene-Oxide) polymer through electrodeposition has yielded promising results for top-gated graphene Field-Effect Transistor (FET) such as high dielectric quality and low mobility degradation. However, the mechanism of dielectric formation and the limits of achievable performance have not been elucidated and questions about its applicability to scalable fabrication schemes remain.

We here demonstrate the in-situ characterization of the PPO layer during electrochemical deposition. Field effect transistors were employed in a sensing configuration to measure the change in dielectric environment throughout the deposition process. By comparison with a reference system, the deposition speed and morphology of PPO on top of graphene could be identified. These parameters were found to sensitively depend on the potential drop across the graphene/electrolyte interface and a feedback scheme was developed that allows the self-limited deposition of dielectric layers with nanometer precision. Lastly, we determined the viability of the PPO dielectric as a gate dielectric by incorporating the electrodeposition process to fabricate a working graphene-based heterojunction device. We report that PPO is an effective dielectric barrier on graphene which allows the device to demonstrate on-off ratios at 102 and exhibit modulation of current.

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