| 研究生: |
藍信翔 Lan, Shin-Shiang |
|---|---|
| 論文名稱: |
感應馬達驅動器硬體迴路測試系統之設計與實作 The Design and Implementation of Hardware-in-the-Loop Tester System for Induction Motor Driver |
| 指導教授: |
陳 敬
Chen, Jing |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系碩士在職專班 Department of Electrical Engineering (on the job class) |
| 論文出版年: | 2012 |
| 畢業學年度: | 100 |
| 語文別: | 中文 |
| 論文頁數: | 96 |
| 中文關鍵詞: | Hardware in the loop 、Real-time simulation 、馬達驅動器 、虛擬馬達 |
| 外文關鍵詞: | Hardware in the loop, HIL, Real-time simulation, AC motor, Virtual motor |
| 相關次數: | 點閱:104 下載:10 |
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馬達的驅動應用系統必須具有穩定、高效率、安全可靠等特性。在馬達驅動系統開發過程中,研發人員必須擁有各種測試設備與不同機械負載來進行完善的設計。昂貴的硬體設備與測試過程之工安風險皆可能產生相當大的成本與意外支出,因此如何測試成為開發馬達驅動器的一大挑戰。本論文設計規劃並實作一感應馬達驅動器測試系統,此系統透過高速數位I/O擷取感應馬達驅動器所控制的三相調變輸出,透過低延遲的演算能力即時回授馬達應有的實際電流與轉速,實現硬體迴路測試系統(Hardware In the loop,HIL)的概念。
HIL系統的虛擬馬達可以快速且連續地即時反應,以模擬實際的交流電機瞬態或穩態響應。本論文設計之系統採用開放的硬體和軟體技術,提供從模擬到實際控制電機驅動器測試解決方案。該系統主要組成部份為:即時處理器、高速輸入輸出模組,與人機操作介面等。其開發介面主要以美商國家儀器提供之軟體−LabVIEW (Laboratory Virtual Instrument Engineering Workbench)與硬體−CompactRIO實作於cRIO之FPGA晶片上建構馬達模型,使HIL系統運算效能與精度得到最佳化;高速輸入輸出模組可擷取感應馬達驅動器之PWM調變信號,並將虛擬馬達的信號回饋給控制器;另經由設定RTOS 通訊介面與人機進行資料傳遞。
本論文設計與實作之感應馬達驅動器硬體迴路測試系統具備以下特性:運算時間小於1uS、提供多驅動器並聯測試、準確編碼器脈波輸出、可進行閉迴路測試。由測試結果之數據顯示本論文所提出的方法可以達到虛擬馬達的概念,與實際馬達反應數據與趨勢接近,可有效降低龐大的測試風險與成本,並可驗證驅動器調變的差異與效果,更加速了感應馬達驅動器開發速度。
In developing motor driver system, any application and process must be examined in details to meet the requirements of efficiency, stability and reliability. For this purpose, tests have to be conducted with various devices and different mechanical loads. In order to reduce the time, cost and risk associated with control system development, the virtual motor in hardware-in-the-loop (HIL) can be applied.
This thesis describes an AC motor driver test system implemented with virtual motor in HIL test platform. The HIL application utilizes open hardware and software technologies to provide motor driver test solutions ranging from simulation to real control. The three main parts of this system are: the real-time processor, the high-speed input and output (I/O) modules, and the human-machine interface. The real-time processor is developed with LabVIEW using CompactRIO platform to construct a model of motor in FPGA chip. The computing performance and accuracy are optimized in the HIL system. The high-speed I/O modules are capable of capturing the PWM modulation signal of AC motor, and output the signal of virtual motor from the HIL to the motor driver.
The implementation of this AC motor drive HIL test system presents the characteristics that the computation time is less than 1uS on the parallel test platform for multi-drive devices, and it can work with closed-loop test with high-precision encoder pulse output. From the results of experiments, it proves that the virtual motor in this HIL system produces the same responses as the actual motor. This HIL system thus can reduce significantly the complexity of motor driver tests and increases the flexibility of running different tests.
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校內:2017-09-12公開