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研究生: 陳逸軒
Chen, Xi-syuan
論文名稱: 應用於24-GHz FMCW汽車雷達與60-GHz WPAN CMOS壓控振盪器之研製
Design of CMOS VCOs for 24-GHz FMCW Automotive Radar and 60-GHz WPAN Applications
指導教授: 莊惠如
Chuang, Huey-Ru
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電腦與通信工程研究所
Institute of Computer & Communication Engineering
論文出版年: 2008
畢業學年度: 96
語文別: 中文
論文頁數: 96
中文關鍵詞: 24GHz壓控振盪器54GHz壓控振盪器
外文關鍵詞: 24GHz VCO, 54GHz VCO
相關次數: 點閱:64下載:16
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  • 本論文主要研製60-GHz CMOS毫米波及24-GHz FMCW車用雷達壓控振盪器,並討論目前在毫米波頻段的本地振盪源,針對各種不同應用、不同製程會有不同的產生方式來介紹現今應用於60-GHz WPAM收發機架構以及24-GHz FMCW雷達振盪源的產生方式,並探索近年來相關的研究。
    12-GHz低電壓低功率的壓控振盪器與米勒除頻器架構採用TSMC 0.18-μm CMOS製程,振盪器採用改良型低電壓低功率互補交鏈式耦合對壓控振盪器,量測結果顯示:輸出頻率12.66-13.7 GHz,輸出功率大於-6 dBm,主動埠消耗功率為6.2 mW,相位雜訊在中心頻率13.49 GHz為-112 dBc/Hz@1 MHz,FOM為-187 dBc/Hz。米勒除頻器量測方面,在除頻範圍中,量測範圍為10.4-14.2 GHz,最低除頻靈敏度量測時為-4.75 dBm@11.5 GHz,core消耗5.4 mW。0.18-μm CMOS 24-GHz 壓控振盪器使用了主動非線性FET倍頻器,量測結果顯示:輸出頻率22.6-24.5 GHz,輸出功率皆大於-13 dBm,VCO core消耗的功率為19.5 mW,倍頻器消耗10.5 mW,相位雜訊為-107.5 dBc/Hz。0.13-μm CMOS 54-GHz壓控振盪源使用了傳輸邏輯閘倍頻器,量測結果顯示:54 GHz VCO輸出頻率為52.92-54.83 GHz,消耗11 mW,相位雜訊在53.34 GHz的量測值為-91.8 dBc/Hz@1 MHz。輸出功率在量測中皆大於-16 dBm。

    This thesis presents the design of CMOS VCOs for 24-GHz FMCW automotive radar and 60-GHz WPAN applications. A 12-GHz low-voltage and low-power VCO and Miller divider are implemented by TSMC 0.18-μm CMOS process. The modified low-voltage corss-coupled pair VCO is used to design the 12-GHz VCO. A 24-GHz VCO which used an active nonlinear FET freuquency doubler is implemented by TSMC 0.18-μm CMOS process. A 54-GHz VCO which used a transmission gate freuquency doubler is implemented by TSMC 0.13-μm CMOS process.
    A 12-GHz low-voltage and low-power VCO and Miller divider are implemented by TSMC 0.18-μm CMOS process. The modified low-voltage corss-coupled pair VCO is used to design the 12-GHz VCO. The measurement results of 12-GHz VCO show: The output frequency is between 12.66-13.7 GHz, the output power is greater than -6dBm, the phase noise is -112 dBc/Hz@1 MHz at 13.49-GHz center frequency and the VCO core consumes 6.2 mW. The measurement results of Miller divider show: The dividing range is 11.4-14.2 GHz, the minimum sensitivity is -4.75 dBm@11.5 GHz. A 24-GHz VCO which used an active nonlinear FET freuquency doubler is implemented by TSMC 0.18-μm CMOS process. The measurement results of 24-GHz VCO show: The output frequency of 24 GHz VCO is between 22.6-24.5 GHz, the phase noise is -107.4 dBc/Hz@1 MHz at 24-GHz center frequency, the output power is greater than -13 dBm, and the 24-GHz VCO consumes 30 mW. A 54-GHz VCO which used a transmission gate freuquency doubler is implemented by TSMC 0.13-μm CMOS process. The measurement results of 24-GHz VCO show: the output frequency is 52.92-54.83 GHz, the phase noise is -91.8 dBc/Hz@1 MHz offset at center frequency of 53.34 GHz, the output power is greater than -16 dBm. The 54GHz VCO consumes 11 mW.

    第一章 緒論1 1.1 24-GHz短距離車用雷達系統簡介1 1.2 短距無線通訊60-GHz WPAN系統簡介5 1.3 論文架構簡介7 第二章 應用於60-GHz WPAN與24-GHz雷達收發機之振盪源型態9 2.1 60-GHz WPAN之振盪源型態9 2.2 24-GHz雷達之振盪源型態15 2.3 FMCW測距雷達系統之探討21 2.4 結論36 第三章 低電壓12-GHz改良型壓控振盪器與米勒寬頻除頻器37 3.1 低電壓操作之壓控振盪器簡介與設計製作流程37 3.2 低電壓操作之壓控振盪器模擬與量測結果46 3.3 米勒寬頻除頻器簡介與設計製作流程50 3.4 米勒寬頻除頻器模擬與量測結果54 3.4 結果討論57 第四章 使用主動倍頻器架構之24-GHz CMOS壓控振盪器59 4.1 使用倍頻器架構之壓控振盪源簡介59 4.2 設計與製作流程60 4.3 模擬與量測結果65 4.4 結果討論70 第五章 使用傳輸邏輯閘倍頻器之54-GHz CMOS VCO73 5.1 使用傳輸邏輯閘倍頻器架構壓控振盪源簡介73 5.2 設計與製作流程74 5.3 模擬與量測結果79 5.4 結果討論81 第六章 結論83 參考文獻85 附錄A 相位雜訊模型與設計87 附錄B 除頻器量測元件之損耗93

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