成功大學博碩士論文系統

簡易檢索 / 詳目顯示

回結果列表

研究生：	陳璟照 Chen, Ching-Chao
論文名稱：	應用陰影疊紋法量測電子元件的共面性與翹曲量 Measurement of Coplanarity and Warpage of Electronic Components Using Shadow Moire Method
指導教授：	陳元方 Chen, Terry Yuan-Fang
學位類別：	碩士 Master
系所名稱：	工學院 - 機械工程學系 Department of Mechanical Engineering
論文出版年：	2008
畢業學年度：	96
語文別：	中文
論文頁數：	84
中文關鍵詞：	共面性、電路板、陰影疊紋法、翹曲量、晶片
外文關鍵詞：	PCB, Shadow Moire, Warpage, Chip, Coplanarity
相關次數：	點閱：118 下載：9
分享至:	分享至facebook 分享至twitter

查詢本校圖書館目錄查詢臺灣博碩士論文知識加值系統勘誤回報

本文主要目的是發展出一套能快速搜尋試件共面性的方法，並搭配陰影疊紋法系統，應用於檢測電子元件的共面性與翹曲量，有效的減少搜尋時間。
首先敘述電子元件所定義的共面性與翹曲量原理，並改變原搜尋方式，以較少的時間搜尋共面性；接著介紹陰影疊紋法原始立論基礎，並加入相位移法、相位展開法...等，用以建立此光學量測系統；在系統精確度量測方面，使用低膨脹係數的玻璃校正片BK7，先以高精度表面粗度儀ET3000量測校正片的階高，用來驗證系統在常溫時的精確度；最後以模擬的六種不同型式的形貌，驗證其正確性。

In this paper, the major purpose is to develop a method to determine the coplanarity quickly and to measure the coplanarity and warpage of electronic components using shadow moiré method. The time of calculating the coplanarity can be decreased effectively.
In the beginning, we describe the definition of coplanarity and warpage in electronic industry, and improve the original method to search coplananrity in a shorter period of time. Then, we introduce the original theory of Shadow Moire, and establish optical measuring system by using Shadow Moire method, phase shifting method, phase unwrapping method…etc. About the accuracy of our system, we measure the correction glass with low coefficient of expansion, BK7. First, we measure of the correction sample using surface roughness measuring instrument ET3000 to examine the accuracy of our system at normal temperature, and simulate six different types of profile to examine the correctness.

摘要 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
A b s t r a c t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I I
致謝 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I I I
圖目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V I I
表目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X I I I
符號說明. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X V
第一章 緒論. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1 研究背景.............................................. 1
2 研究目的............................................. 2
3 文獻回顧............................................. 3
4 本文架構............................................. 5
第二章 共面性量測原理. . . . . . . . . . . . . . . . . . . . . . . . . . 6
1 JEDEC Standard共面性原理............................. 6
1.1 LMS法........................................... 7
1.2 JEDEC SP法...................................... 8
2 快速搜尋法原理....................................... 11
2.1 初步拉平....................................... 12
2.2 多組底座平面的處理............................. 14
2.3 組合法......................................... 16
2.4 側翻法......................................... 17
2.5 組翻法......................................... 19
3 影像3D旋轉原理...................................... 21
4 共面性模擬與測試.................................... 23
4.1 模擬試件與拉平結果............................. 23
4.2 共面性量測模擬試件結果......................... 32
第三章 自動化陰影疊紋系統原理. . . . . . . . . . . . . . . . . 3 4
1 陰影疊紋法之原理簡介[21]............................. 34
2 相位移法 [22] ....................................... 36
3 Macy相位展開法基本概念[22] ......................... 38
第四章 實驗裝置與方法. . . . . . . . . . . . . . . . . . . . . . . . . 3 9
1 實驗系統介紹........................................ 39
2 溫控系統之測試...................................... 40
3 步進馬達校正........................................ 42
4 使用校正片對試件平台與光柵之平行校正................. 45
第五章 系統精確度測試. . . . . . . . . . . . . . . . . . . . . . . . . 4 7
1 精確度測試之試件.................................... 47
2 實驗步驟............................................ 47
3 高精度表面粗度儀ET-3000 規格介紹..................... 48
4 系統的精確度測試.................................... 50
第六章 實驗結果與討論. . . . . . . . . . . . . . . . . . . . . . . . . 5 3
1 電路板升降溫共面性測試.............................. 53
1.1 電路板共面性量測結果........................... 53
1.2 電路板各種共面性拉平結果與討論................. 66
2 IC晶片模擬回火升降溫實驗............................ 71
2.1 模擬晶片回火升降溫實驗結果..................... 72
2.2 晶片各種共面性拉平結果與討論................... 77
第七章 結論與建議. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 9
1 結論................................................ 79
2 建議................................................ 80
參考文獻. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1
自述 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4
                                    

1. L. J. Chiponis, S. Jose,“Coplanarity Tester Surface Mounted Device, ” United States Patent Chiponis, Appl. No. 38,305, 1988.
2. T. Kida,“Means for Measuring Coplanarity of Leads on an IC Package, ” United States Patent Kida, Appl. No.729,921, 1993.
3. S. Bilodeau,“Method for Coplanarity Inspection of Package or Substrate Warpage for Ball Grid Arrays, Column Arrays,and Similar Structures, ” United States Patent, Appl. No.253,989, 1995.
4. JEDEC STANDARD “Coplanarity Test for Surface-Mount Semicondutor,”
2003.
5. JEDEC STANDARD “High Temperature Package Warpage Measurement Methodology, ”2005.
6. Y. Kwon, S. Danyluk, L. Bucciarelli and J. P. Kalejs, “Residual Stress Measurement in Silicon Sheet By Shadow Moire Interferometry, ” Journal of Crystal Growth, Vol.82, No.1-2, pp.221-227, Jul 22-25, 1986.
7. R. C. Schwarz, “Determination of Out-of-Plane Displacements And The Initiation of Buckling In Composite Structural Elements, ” Experimental Techniques, Vol.12, No.1, pp.23-28, January, 1988.
8. R. Stiteler, I. C. Ume, “In-Process Board Warpage Measurement in a Lab Scale Wave Soldering Oven, ” IEEE Transactions on Components, Packaging, And Manufacturing Technology, Part A, Vol.19, No.4, pp.562-569, December, 1996.
9. R. Stiteler, I. C. Ume, “System for Real-Time Measurement of Thermally Induced PWB/PWA Warpage, ” Journal of Electronic Packaging, Vol.119, pp.1-7, March, 1997.
10. W. Wei-Chung; L. Yu-Wen, “Moire technique and measurement of vibrationsMeasurement of warpage of electronic packagings after machining by phase-shifting shadow moire method ” Source Proceedings of SPIE - The International Society for Optical Engineering, v 4537, pp 20-24, 2001.
11. Y.A. Moreno, “Moire technique and measurement of vibrations”Proceedings of SPIE - The International Society for Optical Engineering, v 4419, pp 202-205, 2001
12. S.P Cao., K.A. Ngoi, Y.F Song, L. Lim, “A new Moire method for industry on-line measurement” Source: Proceedings of SPIE - The International Society for Optical Engineering, v 4317, pp 186-191, 2001
13. W. Yinyan and H. Patrick, “Measurement of Thermally Induced Warpage of BGA Packages/Substrates Using Phase-Stepping Shadow Moire, ” IEEE/CPMT Electronic Packaging Technology Conference, pp.283-289, 1997.
14. W. Yinyan and H. Patrick, “On-line Measurement of Thermally Induced Warpage of BGAs with High Sensitivity Shadow Moire, ” The International Journal of Microcircuits and Electronic Packaging, Vol.23, No.2, pp.191-196, Second Quarter 1998.
15. J. Gregory , and I. Charles, “Warpage Studies of HDI Test Vehicles During Various Thermal Profiling, ” Electronic Components and Technology Conference, IEEE, pp.1640~1646, 2000.
16. Y. Polsky, W. Sutherlin, and I. Charles, “A Comparison of PWB Warpage Due to Simulated Infrared and Wave Soldering Processes, ” IEEE Transactions On Electronics Packaging Manufacturing, Vol.23, No.3, pp.191~199, July, 2000.
17. K. Verma, D. Columbus, B. Han and B. Chandran, “Real-Time Warpage Measurement of Electronic Components With Variable Sensitivity, ” Electronic Components and Technology Conference, IEEE, pp.975-980, 1998.
18. K. Verma, D. Columbus and B. Han, “Development of Real Time/Variable Sensitivity Warpage Measurement Technique and its Application to Plastic Ball Grid Array Package, ” Transactions On Electronics Packaging Manufacturing, IEEE, Vol.22, No.1, pp.63-70, January 1999.
19. 陳志松, “應用光測力學在電子構裝之量測分析, ” 國立臺灣大學應用力學研究所碩士論文, 2000.
20. 鄭仲豪, “應用相位移陰影疊紋量測高溫下晶圓的變形”,國立成功大學機械工程學系碩士論文, 2002。
21. 莊佳橙, “應用自動化相位移陰影疊紋系統量測晶圓外型”,國立成功大學機械工程研究所碩士論文, 2003。
22. 楊韶綸, “條紋反射法之向量解析與應用”,國立成功大學機械工程研究所碩士論文,2007。
23. F. DAVID,J. ALAN “MATHEMATICAL ELEMENTS FOR COMPUTER GRAPHICS”, McGraw-Hill Education,ch3,pp46-59,1978。

校內：2023-08-01公開
校外：2023-08-01公開

簡易檢索 / 詳目顯示

相關論文