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研究生: 陳又禮
Chen, Yu-Li
論文名稱: 考慮交互作用之系統級封裝模擬與最佳化研究
Simulation and Optimization of System in Package Structure with Interaction Effects
指導教授: 黃聖杰
Hwang, Sheng-Jye
學位類別: 碩士
Master
系所名稱: 工學院 - 機械工程學系
Department of Mechanical Engineering
論文出版年: 2025
畢業學年度: 113
語文別: 中文
論文頁數: 237
中文關鍵詞: 系統級封裝轉注成型翹曲預測田口方法灰關聯分析交互作用最佳化
外文關鍵詞: System-in-Package, Transfer molding, Warpage, Residual stress, Taguchi methods, Grey relational analysis, Interaction, Optimization
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  • 隨著IC先進封裝技術的演進,如何提升封裝產品的製程良率與可靠度是一項挑戰,對製造商而言,使用實驗測試與驗證方式需耗費大量時間、金錢以及占用生產設備,近年來為了降低研發和測試成本,在生產前進行製程的預測分析成了一項可達成的目標。因此本研究將利用Moldex3D軟體針對System-in-Package封裝體進行分析,並結合完整製程架構的數位雙生概念並將其延伸應用於考慮交互作用之參數最佳化分析,進而建立一套具系統性與高實用性的製程最佳化流程。
    本研究在對製程優化時使用多種模型描述封裝時的模流及變形行為,在模擬過程中採用Cross-Castro-Macosko黏度模型與Kamal’s反應動力模型,模擬不同溫度與熟化度對EMC流動行為的影響。而翹曲預測則使用後熟化求解器,結合Two-domain modified Tait P-V-T-C模型及Dual shift factor model黏彈模型,考慮固化收縮、熱收縮及黏彈行為,以更精確預測封裝體在後熟化製程中的應力鬆弛與變形現象,透過以上模型能夠更精準的進行模擬預測。本研究對包封、翹曲及von-Mises stress的數值及分布進行準確預測,並以此結果作為後續多目標優化的依據。
    本研究針對多目標優化進行深入探討,分為「未考慮交互作用」與「考慮交互作用」兩個部分進行分析。首先,在未考慮交互作用的階段,選取包封數量、後熟化翹曲量及平均von-Mises stress作為關鍵品質指標,運用田口方法與灰關聯分析進行參數最佳化,並探討不同製程參數對品質特性的影響。此階段採用低解析度的三級直交表進行初步分析,結果發現各品質特性的最佳參數組並不一致,顯示多品質特性間存在取捨關係。透過灰關聯分析,綜合三項品質特性,獲得整體最佳化參數組。由於低解析度直交表容易造成主效應與交互作用的混淆,進而影響結果的準確性,因此本研究在下一階段納入交互作用考量,並使用四級解析度直交表進行更細緻的分析。
    在考慮交互作用的情境下,品質特性的最佳參數組與初步分析結果有所不同,且成功降低所有品質指標的數值,驗證模擬結果亦顯示最佳化參數符合預期。分析結果顯示,單獨的後熟化時長對品質特性的影響不顯著,但其與Solder mask與Prepreg比例及模溫間存在顯著交互作用,進一步證明主效應與交互作用共同影響品質特性。因此,考慮交互作用對於製程參數的最佳化具有關鍵性。
    本研究透過結合Moldex3D與田口方法,提升系統級封裝製程最佳化的準確性與可靠性,並針對製程參數間的交互作用進行詳細探討。相較於傳統忽略交互作用的研究模式,本研究填補了此領域的重要缺口。最終結果證實,納入交互作用的分析不僅能提升模擬預測的精度,也為未來機器學習模型的訓練提供參數權重的參考基礎,展現其在封裝製程預測與優化上的潛力與應用價值。
    本研究亦自前端參數設計階段延伸至後段成型與熟化模擬分析,實現完整製程之虛擬建模,展現出優異的資料整合與參數診斷能力,為數位雙生技術的導入與落地應用奠定堅實基礎。藉由此虛實整合平台,不僅可於開發初期即進行封裝品質與潛在風險之預測,更能進一步應用於製程最佳化問題求解,並具備與製程監控系統及自動化控制機制整合之潛力,實現高精度、智慧化之製程決策支援與品質控制。

    With the rapid advancement of IC advanced packaging, ensuring high yield and reliability has become increasingly challenging. To reduce the time and cost of experimental validation, simulation-based analysis has emerged as a key tool. This study employs Moldex3D to analyze system-in-package structure, integrating Taguchi methods for optimization, while also evaluating the impact of considering interaction effects.
    The Cross-Castro-Macosko viscosity model and Kamal’s cure kinetics model are used to simulate EMC flow, and the post-mold curing solver incorporates the P-V-T-C model and viscoelastic behavior for accurate warpage prediction. Simulation results show air traps commonly occur behind large chips due to uniform flow fronts. Warpage and von-Mises stress distributions are accurately predicted to support optimization.
    In this study, an initial analysis that excluded interaction effects was conducted to evaluate the influence of process parameters on quality characteristics and to determine the optimal settings. Grey Relational Analysis is applied to integrate the three response outcomes into a single grey relational grade. By normalizing and combining these grades, we achieve a balanced assessment of all quality indicators and thus determine a parameter set that simultaneously mitigates air traps, warpage and stress. However, verification results revealed noticeable discrepancies between the predicted and simulated outcomes. In contrast, the analysis incorporating interaction effects demonstrated that considering these effects improves the accuracy of optimization. These findings underscore the importance of incorporating interaction effects in the optimization process to enhance prediction reliability.

    摘要 i Extended Abstract iii 致謝 lxix 目錄 lxxi 表目錄 lxxvi 圖目錄 lxxix 符號說明 lxxxiii 第一章 緒論 1 1-1前言 1 1-2 IC封裝介紹 2 1-2-1封裝特性材料簡介 3 1-2-2 IC封裝製程 3 1-3包封生成現象 6 1-4翹曲變形現象 7 1-5殘留應力 9 1-6文獻回顧 9 1-6-1包封 9 1-6-2翹曲與殘留應力 12 1-7研究動機與目的 16 1-8論文架構 17 第二章 理論基礎與實驗量測 19 2-1模流分析理論 19 2-2翹曲應變分析理論 23 2-3應力鬆弛理論‎[42] 30 2-4材料量測實驗 33 2-4-1流變儀實驗 33 2-4-2 DSC (Differential scanning calorimetry) 實驗 35 2-4-3 P-V-T-C實驗 36 2-4-4 DMA (Dynamic mechanical analyzer)實驗 37 2-5高分子材料模型 41 2-5-1黏度模型‎[43] 41 2-5-2反應動力模型‎[44] 43 2-5-3 P-V-T-C模型‎[17]‎[45] 45 2-5-4黏彈模型‎[42] 48 2-6材料等效混合定律 54 第三章 研究方法 55 3-1實驗設計(Design of experiment,DOE) ‎[46] 55 3-1-1田口方法(Taguchi methods)概述 56 3-1-2控制因子及固定因子 57 3-1-3品質特性及理想機能 58 3-1-4訊號雜訊比(Signal-to-noise ratio,SNR,eta) 61 3-1-5直交表L27 63 3-1-6因子反應分析 66 3-2灰關聯分析法(Grey relational analysis,GRA)‎[46] 66 第四章 數值方法分析 69 4-1模流軟體簡介 69 4-2模型幾何結構 69 4-3網格模型 71 4-3-1網格收斂性分析 73 4-3-2建模流程 74 4-4材料設定及其性質 76 4-5分析設定 77 4-5-1製程參數設定 77 4-5-2邊界條件設定 79 4-6 模流分析結果 82 4-6-1流動分析 82 4-6-2包封分析 85 4-6-3熟化度分析 86 4-6-4體積收縮率分析 87 4-7翹曲及殘留應力分析結果 88 4-7-1第一階段負重及冷卻後分析結果(After molding) 88 4-7-2第二階段負重及冷卻後分析結果(After PMC) 94 第五章 考量交互作用的參數最佳化分析 99 5-1未考慮交互作用之分析結果 99 5-1-1前置模擬設定 99 5-1-2以包封數量為品質之模擬結果分析 101 5-1-3以後熟化後翹曲為品質之模擬結果分析 105 5-1-4以平均殘留應力為品質之模擬結果分析 107 5-1-5灰關聯結果分析 110 5-1-6模擬驗證最佳化參數 114 5-2考慮交互作用之分析結果 115 5-2-1前置模擬設定 115 5-2-2以包封數量為品質之模擬結果分析 117 5-2-3以後熟化後翹曲為品質之模擬結果分析 120 5-2-4以平均殘留應力為品質之模擬結果分析 124 5-2-5模擬驗證最佳化參數 127 5-3 模擬驗證比較 128 第六章 結論與未來展望 130 6-1結論 130 6-2未來展望 134 參考文獻 136 索引 141

    [1]. R.-Y. Chang, W.-H. Yang, S.-J. Hwang, and F. Su, “Three-dimensional modeling of mold filling in microelectronics encapsulation process,” IEEE Transactions on Components and Packaging Technologies, Vol. 27, no. 1, pp. 200-209, 2004.
    [2]. C. Y. Khor, M. Z. Abdullah, M. K. Abdullah, M. A. Mujeebu, D. Ramdan, M. F. M. A. Majid, Z.M. Ariff , and M. A. Rahman, “Numerical analysis on the effects of different inlet gates and gap heights in TQFP encapsulation process,” International Journal of Heat and Mass Transfer, Vol. 54, no. 9-10, pp. 1861-1870, 2011.
    [3]. C. Y. Khor, M. Z. Abdullah, Z. M. Ariff, and W.-C. Leong, “Effect of stacking chips and inlet positions on void formation in the encapsulation of 3D stacked flip-chip package,” International Communications in Heat and Mass Transfer, Vol. 39, no. 5, pp. 670-680, 2012.
    [4]. D. Ramdan, M. Z. Abdullah, and N. M. Yusop, “Effects of outlet vent arrangement on air traps in stacked-chip scale package encapsulation,” International Communications in Heat and Mass Transfer, Vol. 39, no. 3, pp. 405-413, 2012.
    [5]. R. Kulkarni, P. Wappler, M. Soltani, M. Haybat, T. Guenther, T. Groezinger, and A. Zimmermann, “An assessment of thermoset injection molding for thin-walled conformal encapsulation of board-level electronic packages,” Journal of Manufacturing and Materials Processing, Vol. 3, no. 1, pp. 18, 2019.
    [6]. M. Rovitto and A. Cannavacciuolo, “Transfer molding simulation to predict filling flaws and optimize package design,” 2019 22nd European Microelectronics and Packaging Conference & Exhibition (EMPC), pp. 1-5, 2019.
    [7]. B.-Y. Huang, I. Hu, D.-L. Chen, D. Tarng, and C.-P. Hung, “Design for void free transfer molding SiP,” 2020 15th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), pp. 40-44, 2020.
    [8]. T. Saito, T. Kitajima, M. Kawaguchi, S. Tajima, and M. Okamoto, “New molding technology enabling advanced packaging technology,” 2020 IEEE 70th Electronic Components and Technology Conference (ECTC), pp. 1957-1963, 2020.
    [9]. H.-H. Hung, Y.-C. Cheng, S.-J. Hwang, D.-L. Chen, H.-J Chang, B.-Y Huang, H.- H Huang, C.-C Wang, and C.-P Hung, “Analysis of flip-chip ball grid array underfill flow process,” The International Journal of Advanced Manufacturing Technology, Vol. 134, no. 9, 2024.
    [10]. H.-H Hung, Y.-C Cheng, S.-J Hwang, D.-L Chen, H.-J Chang, B.-Y Huang, H.-H Huang, C.-C Wang, and C.-P Hung, “Effect of flip-chip ball grid array structure on capillary underfill flow,” Results in Engineering, Vol. 23, 2024.
    [11]. Y.-C Cheng, S.-J Hwang, D.-L Chen, H.-J Chang, B.-Y Huang, H.-H Huang, C.-C Wang, and C.-P Hung, “Accurate numerical simulations of capillary underfill process for flip-chip packages.” Engineering with Computers, 2024.
    [12]. S. Timoshenko, “Analysis of Bi-metal thermostats,” Journal of the Optical Society of America, Vol. 11, no. 3, pp. 233-255, 1925.
    [13]. G. Kelly, C. Lyden, W. Lawton, J. Barrett, A. Saboui, and H. Pape, “Importance of molding compound chemical shrinkage in the stress and warpage analysis of PQFPs,” IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B, Vol. 19, no. 2, pp. 296-300, 1996.
    [14]. S. A. Bidstrup-Allen, S.-T. Wang, L. Nguyen, and F. Arbelaez, “Rheokinetics models for epoxy molding compounds used in IC encapsulation,” Proceedings. The First IEEE International Symposium on Polymeric Electronics Packaging, PEP'97 (Cat. No. 97TH8268), pp. 149-157, 1997.
    [15]. K. Oota and M. Saka, “Cure shrinkage analysis of epoxy molding compound,” Polymer Engineering & Science, Vol. 41, no. 8, pp. 1373-1379, 2001.
    [16]. G. Hu, S. Chew, and B. Singh, “Cure shrinkage analysis of green epoxy molding compound with application to warpage analysis in a plastic IC package,” 2007 8th International Conference on Electronic Packaging Technology, pp. 1-5, 2007.
    [17]. S.-J. Hwang and Y.-S. Chang, “Isobaric cure shrinkage behaviors of epoxy molding compound in isothermal state,” Journal of Polymer Science Part B: Polymer Physics, Vol. 43, no. 17, pp. 2392-2398, 2005.
    [18]. L.-C. Hong and S.-J. Hwang, “Study of warpage due to PVTC relation of EMC in IC packaging,” IEEE Transactions on Components and Packaging Technologies, Vol. 27, no. 2, pp. 291-295, 2004.
    [19]. S.-Y. Teng and S.-J. Hwang, “Simulations of process-induced warpage during IC encapsulation process,” Journal of Electronic Packaging, pp.307-315, 2007.
    [20]. S.-S. Deng, S.-J. Hwang, H.-H. Lee, D.-Y. Huang, and G.-S. Shen, “Warpage simulations with PVTC equation and experiments of Fan-out Wafer Level Package after encapsulation process,” 2010 5th International Microsystems Packaging Assembly and Circuits Technology Conference, pp. 1-4, 2010.
    [21]. C.-C. Wang C.-C. Wang, C.-T. Huang, C.-C. Hsu, R.-Y. Chang, R. Huang, M. F. Huang, and S.-J. Hwang, “Investigation on the PVTC Property Characterization and its Importance on IC Encapsulation Material Application,” AIP Conference Proceedings, Vol. 2065, no. 1, 2019.
    [22]. J. D. Ferry, Viscoelastic Properties of Polymers. John Wiley and Sons, 1980.
    [23]. M. Amagai, “Characterization of chip scale packaging materials,” microelectronics reliability, Vol. 39, no. 9, pp. 1365-1377, 1999
    [24]. J. H. Park, J. K. Kim, M. M. F. Yuen, S. W. R. Lee, P. Tong, and P. C. H. Chan, “Thermal stress analysis of a PQFP moulding process: comparison of viscoelastic and elastic models,” Key engineering materials, pp. 1127-1132, 1998.
    [25]. J. Wang, Z. Qian, and S. Liu, “Process Induced Stresses of a Flip-Chip packaging by sequential processing modeling technique,” Journal of Electronic Packaging, Vol. 120, no. 3, 1998.
    [26]. D. T. Yeung and M. M. Yuen, “Warpage of plastic IC packages as a function of processing conditions,” Journal of Electronic Packaging, Journal of Electronic Packaging, Vol. 123, no. 3, pp. 268-272, 2001.
    [27]. W. Lin and M.-W. Lee, “PoP/CSP warpage evaluation and viscoelastic modeling,” 2008 58th Electronic Components and Technology Conference, pp. 1576-1581, 2008.
    [28]. C.-H. Shue, S.-J. Hwang, H.-H. Lee, D.-Y. Huang, and Y.-J. Lee, “Post-mold cure process simulation of IC packaging,” 2008 International Conference on Electronic Materials and Packaging, pp. 106-110, 2008.
    [29]. Y.-J. Lin, S.-J. Hwang, H.-H. Lee, and D.-Y. Huang, “Modeling of viscoelastic behavior of an epoxy molding compound during and after curing,” IEEE Transactions on Components, Packaging and Manufacturing Technology, Vol. 1, no. 11, pp. 1755-1760, 2011.
    [30]. W. K. Loh, R. W. Kulterman, C.-C. Hsu, and H. Fu, “Modeling of molded electronic package warpage characteristic with cure induced shrinkage and viscoelasticity properties,” 2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT), pp. 1-9, 2018.
    [31]. H.-Y. Guo, “Prediction of warpage considering PVTC relation and viscoelastic behavior of EMC during IC encapsulation process,” Master Thesis, Department of Mechanical Engineering, National Cheng Kung University, 2020.
    [32]. C.-C. Lee, C.-P. Chang, C.-Y. Chen, H.-C. Lee, and G. C.-F. Chen, “Warpage estimation and demonstration of Panel-level fan-out packaging with Cu pillars applied on a highly integrated architecture,” IEEE Transactions on Components, Packaging and Manufacturing Technology, 2023.
    [33]. C.-C. Lee, and H.-Z. Lin, “Modeling the cure shrinkage-induced warpage of epoxy molding compound,” International Journal of Mechanical Sciences, Vol. 268, 2024.
    [34]. C.-C. Lee, Y.-H. Lin, and D.-P. Yang, “Stress-induced warpage estimation of advanced semiconductor copper interconnect processes,” International Journal of Mechanical Sciences, Vol. 284, 2024.
    [35]. C.-H. Lo, T.-Y Chang, T.-Y. Lee, and S.-J. Hwang, “Analysis of warpage and reliability of very thin profile fine pitch ball grid array,” Heliyon, Vol 10, no. 15, 2024.
    [36]. C.-W. Liang, Y.-C. Sung, S.-J. Hwang, M.-H. Shih, W.-H. Liao, T.-H. Lin, and D.-Y. Yang, “Fan-out panel-level package warpage and reliability analyses considering the fabrication process,” Journal of Manufacturing Processes, Vol. 119, pp. 649-665, 2024.
    [37]. T.-Y. Lee, Y.-L. Chen, S.-J. Hwang, W.-L. Cheng, and C.-Y. Ko, “Compression molding flow behavior and void optimization of an integrated circuit package with shielding-metal-frame,” Polymers, Vol 17, no.10, pp.1301, 2025.
    [38]. T.-Y. Lee, Y.-L. Chen, S.-J. Hwang, W.-L. Cheng, and C.-Y. Ko, “Viscoelastic warpage and stress analysis in SIP packaging: Numerical simulation and experimental validation,” Results in Engineering, Vol 26, 2025.
    [39]. A. Agarwal, M. K. W. Kalenga, and M. Ilunga, “CFD simulation of fluid flow and combustion characteristics in aero-engine combustion chambers with single and double fuel inlets,” Processes, Vol. 13, no. 1, 2025.
    [40]. J. A. Ochoa Tapia, and S. Whitaker, “Momentum transfer at the boundary between a porous medium and a homogeneous fluid-I. Theoretical development,” International Journal of Heat and Mass Transfer, Vol. 38, 1995.
    [41]. S.-S. Deng, S.-J Hwang, and H.-H Lee, “Temperature prediction for system in package assembly during the reflow soldering process,” International Journal of Heat and Mass Transfer, Vol. 98, 2016.
    [42]. M.-Y. Lin, Y.-J. Zeng, S.-J. Hwang, M.-H. Wang, H.-P. Liu, and C.-L. Fang, “Warpage and residual stress analyses of post-mold cure process of IC packages,” The International Journal of Advanced Manufacturing Technology, Vol. 124, no. 3, pp. 1017-039, 2023.
    [43]. M. K. Abdullah, M. Z. Abdullah, M. A. Mujeebu, S. Kamaruddin, and Z. M. Ariff, “A study on the effect of epoxy molding compound (EMC) rheology during encapsulation of stacked-chip scale packages (S-CSP),” Journal of Reinforced Plastics and Composites, Vol 28, no. 20, 2009.
    [44]. S.-S. Deng, S.-J. Hwang, and H.-H. Lee, “Warpage prediction and experiments of fan-out waferlevel package during encapsulation process,” IEEE Transactions on Components, Packaging and Manufacturing Technology, Vol. 3, no. 3, pp. 452-458, 2013.
    [45]. S.-J. Hwang and Y.-S. Chang, “P-V-T-C equation for epoxy molding compound,” IEEE Transactions on Components and Packaging Technologies, Vol. 29, no. 1, pp. 112-117, 2006.
    [46]. Y.-Y. Chang, J.-R. Qiu, and S.-J. Hwang, “Multi-objective optimization of directed energy deposition process by using Taguchi-Grey relational analysis,” The International Journal of Advanced Manufacturing Technology, Vol. 120, no. 11, pp. 7547-7563, 2022.

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