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研究生：	蔡吉明 Tsai, Chi-ming
論文名稱：	以有機金屬沉積法成長具有自然粗糙化界面之高效率氮化銦鎵發光二極體與元件特性研究 High-efficiency InGaN LEDs with Naturally roughed interfaces grown by MOCVD
指導教授：	張守進 Chang, Shoou-Jinn 許進恭 Sheu, Jinn-Kong
學位類別：	博士 Doctor
系所名稱：	電機資訊學院 - 微電子工程研究所 Institute of Microelectronics
論文出版年：	2009
畢業學年度：	97
語文別：	英文
論文頁數：	124
中文關鍵詞：	氮化鎵、有機金屬化學氣相沉積
外文關鍵詞：	GaN, MOCVD
相關次數：	點閱：54 下載：2
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在本篇論文中，我們以有機金屬化學氣相沉積法之技術成長氮化銦鎵／氮化鎵材料之藍光與綠光的多層量子井結構發光二極體以及研究涵蓋光電特性的相關性質。
首先，我們致力於氮化鎵系列材料發光二極體的表面形態之處理技術，以磊晶成長技術形成的自然粗糙介面（氮化鎵與空氣間及氮化鎵與藍寶石基板間之介面）之構造達到改善光取出效率之目的。
而以此技術自我組成的表面構造有V形凹洞與島狀凸塊兩種。並且V形凹洞與島狀凸塊的空間尺寸與密度可藉由調變磊晶成長條件之成長速率、反應源的五族元素與三族元素比例、成長環境與成長溫度以得到良好的控制。由實驗結果顯示以此磊晶技術自我組成的表面構造製成之氮化鎵系列材料發光二極體比一般會造成反射的表面構造(及平滑表面) 之發光二極體，其亮度輸出功率有效地提升至少50﹪。
雖然發光二極體元件表面的V形凹洞構造可達到粗化氮化鎵與空氣間（或氮化鎵與封裝用樹脂間）的介面因而增加光取出效率，但V形凹洞構造會形成漏電流路徑而導致不良的抗靜電特性。這是因為V形凹洞構造為成串磊晶錯位在表面的終止處，並且在以p型氮化鎵磊晶層的密集V形凹洞構造亦與貫穿發光主動層磊晶錯位相關。因此，為了保持甚至增強抗靜電特性，應該減少在p型氮化鎵磊晶層的V形錯位。在此研究中，我們採用插入一層高溫成長的p型氮化鎵磊晶層以研製出以V形凹洞構造為表面的高抗靜電能力與高效率之氮化鎵系列材料發光二極體。此種發光二極體具備抑制貫穿整個磊晶層之錯位，因此相較於一般以V形凹洞構造為表面之氮化鎵系列材料發光二極體，其有更良好的抗靜電特性。
此外，我們研究發展了將鎂處理之製程結合在成長p型氮化鎵接觸層過程中斷磊晶成長之技術，應用在氮化鎵系列材料發光二極體之表面磊晶成長出高密度的島狀凸塊構造（即截形錐體構造）。此新型表面構造能有效地增強氮化鎵系列材料發光二極體之光取出效率。由實驗結果顯示，以截形錐體構造為表面之氮化鎵系列材料發光二極體具備輸出功率增強60﹪的特性。其功率增強之原因為粗化的發光二極體表面可縮短光路徑的長度進而提升光取出效率。
在此研究中，我們也展示了以矽烷處理製程方法在氮化鎵系列材料發光二極體之氮化鎵與藍寶石基板間之介面進行即時粗化的技術。此技術先在藍寶石表面形成具有奈米等級凹洞之氮化矽薄膜層，其效果類似具備圖案的藍寶石基板。經過磊晶成長後，以透射電子顯微鏡可觀察在氮化鎵與藍寶石基板介面有多量空隙存在。當操作在20毫安培時，以矽烷處理製作之氮化鎵系列材料發光二極體與未以矽烷處理製作之氮化鎵系列材料發光二極體，其平均輸出光功率分別為18.0與15.6毫瓦，意即矽烷處理製程技術可提升15﹪的輸出功率。此主因為在氮化鎵與藍寶石基板間介面產生自然粗化之散射現象，可增加發光二極體中由主動層產生之光子射出的機率。上述的主題將在此論文中詳細地討論。

In this dissertation, high-efficiency blue and green InGaN/GaN multiple- quantum well (MQW) light emitting diodes(LEDs) have been grown by metalorganic chemical vapor phase deposition (MOCVD) technique, and related characterizations including optical and electrical properties were also studied.
In order to improve the light extraction efficiency(LEE) by means of naturally interface(GaN/air or GaN/sapphire interface) texturing during epitaxial growth, we first focused our efforts on the manipulation of surface morphology in GaN-based LEDs. The self-assembled surface textures including V-shaped pits and bump islands. The size and density of these pits or bump islands could well controlled by changing growth conditions such as growth rate, V/III ratio of precursors, growth ambient and growth temperature. Experimental results indicated that the self-assembled surface textures on GaN-based LEDs could effectively enhance light output power at least 50 % compared to conventional LEDs with specular(i.e. smooth) surface.
Although the V-shaped pits on a LED’s surface can lead to a rough GaN/air(or resin) interface, thereby enhancing the LEE, these V-shape pits will become a leakage path that will lead to worse ESD characteristics. The V-shape pits also appears as a result of surface termination of threading dislocations , and the dense V-shaped pits found on p-GaN top layer were related to threading dislocations intersecting the active layer. Therefore, in order to maintain or enhance ESD characteristics, pit-related TDs on p-GaN layer should be minimized. In this study, a high-temperature-grown (HTG) p-GaN insertion layer was adopted to achieve a high ESD and efficiency GaN-based LEDs with V-shaped pits on surface. The GaN-based LEDs with the HTG p-GaN insertion layer could effectively suppress the pits-related TDs to intersect the whole layer structure and thereby leads to the better ESD characteristics compared with those of conventional GaN-based LEDs with V-shape textured surface.
On the other hand, we developed a “Mg-treatment “ process combined with a growth interrupt performed during the growth of p-GaN contact layer to lead to the formation of desne bump islands(i.e., truncated pyramids) on the GaN-based LEDs’ surface. The novel surface textures could effectively enhance the LEE of GaN LEDs. Experimental results indicated that GaN-based LED with the truncated pyramids on the surface exhibit an enhancement in output power of around 60 %. This enhancement can be attributed to that a rough LED surface could result in a reduction of photon path length for light extraction.
In this study, we also demonstrated an in-situ roughening technique at the GaN/sapphire interface in GaN-based LEDs using a silane-treatment (SiH4-treatment) process that forms a thin SiNx layer with nanometer-sized holes on the sapphire surface which behave like a patterned sapphire substrate. After epitaxial growth, a plurality of voids at the GaN/sapphire interface was observed according to the transmission electron microscopy analysis. With a 20 mA current injection, the results indicated that the typical output power of light-emitting diodes grown with and without the SiH4-treatment process are approximately 18.0 and 15.6 mW, respectively. In other words, the output power could be enhanced by 15 percent with the use of the SiH4-treatment process. The enhancement of output power is mainly due to light scattering at the naturally-textured GaN/sapphire interface, which can lead to a higher escape probability for the photons emitted from the active layer in a LED. The aforesaid topics will be discussed in detail in this dissertation.

Contents
Abstract
(in Chinese)	……………………………………………………………………	i
Abstract
(in English)	……………………………………………………………………	iv
Contents	……………………………………………………………………	vii
Table Captions	……………………………………………………………………	ix
Figure Captions	……………………………………………………………………	x
		
CHAPTER 1 	Introduction	
1.1 	Background of III-nitride semiconductors ………………………	1
1.2 	Improvement of light-extraction efficiency of GaN/sapphire-based LED………………………………………………………………	
3
		
CHAPTER 2 	Metalorganic Chemical Vapor Deposition System	
2.1 	Brief description for metal-organic vapor-phase epitaxy system……………………………………………………………	
10
2.2 	MOCVD Reactor used in this study………………………………	13
2.3 	Epitaxial Growth by In-Situ Reflectance Monitor…………………	15
		
CHAPTER 3 	Different Surface Morphologies of GaN-based LEDs Grown by MOCVD on sapphire	
3.1 	Growth of LEDs with planar surface ……………………………	33
3.2 	Growth of LEDs with V-shaped pits on surface…………………	34
3.3 	Growth of LEDs with bump islands on surface……………………	37
		
CHAPTER 4 	High-efficiency and Improved ESD Characteristics of GaN-based LEDs with Naturally Textured Surface	
4.1 	Effect of thickness of p-GaN contact layer on  ESD Characteristics for LEDs with planar surface……………………	61
4.2 	Light outputs of GaN LEDs with V-shaped pits on surface………	62
4.3 	Characterization of LEDs with bump islands on surface …………	64
4.4 	ESD characteristics of LEDs with V-shaped pits on p-GaN surface improved by inserting a high-temperature-grown layer between the p-AlGaN layer and the low-temperature-grown p-GaN contact layer………………………………………………………………	68
4.5 	High Output Intensity of Power Chips Multi -Quantum Well Blue and Green Light Emitting Diodes…………………………………	
73
		
CHAPTER 5 	GaN-based LEDs output power improved by textured GaN/sapphire interface using in-situ SiH4 treatment process during epitaxial growth	
5.1 	Introduction………………………………………………………	101
5.2 	GaN-based LEDs by textured GaN/sapphire interface using in-situ with and without SiH4 treatment process…………………………	102
5.3 	Results and discussion……………………………………………	103
		
CHAPTER 6 	Conclusion	121



Table Captions:

Table 2-1 RT200 Technical Specifications. ……………………………………………20
Table 4-1 Aging test conditions for power-chip LEDs, emitting a wavelength of around 465 nm, with bump islands on p-GaN surface. These LEDs were diced into different sizes(1000x1000,750x750,600x600m2).  ……………………………………………79


Figure Captions:

Chapter 2:
Figure 2-1 Schematic reactor of production scale EMCORE D180 MOCVD system. ……………………………………………………………………………………21
Figure 2-2 Veeco D-180  6 x 2” (a) Wafer Carrier with Sapphire Wafers Loaded
(b) III-Alky and V-Hydride position. ……………………………………………………22
Figure 2-3 VEECO E300 system 21 x 2” Wafer Carrier. ………………………………23
Figure 2-4 Schematic reactor of production scale VEECO E300 GaN I system. ………24
Figure 2-5 Schematic reactor of production scale VEECO E300 GaN I and GaN II. …………………………………………………………………………………………25
Figure 2-6 VEECO E300 GaN II system flow stability map condition simulation software. …………………………………………………………………………………26
Figure 2-7 VEECO E300 Operating monitor. ……………………………………………27
Figure 2-8 RealTemp 200 System. ………………………………………………………28
Figure 2-9 RealTemp 200 Operating Screen. ……………………………………………29
Figure 2-10 In-situ reflectometry for a bulk growth run.  ………………………………30
Figure 2-11Analysis of GaN Growth Run. ………………………………………………31
Figure 2-12 VEECO K465 45”X2 system (a) chamber cross-section design (b) wafer carrier design. ……………………………………………………………………………32

Chapter 3:
Figure 3-1 Typical surface morphology of LED with specular surface taken by (a) optical microscopy ( X 1000 ) (b) AFM image  ( c ) SEM image ( X 10000)  (d) TEM image. ……………………………………………………………………………………44
Figure 3-2 Typical growth procedure of a LED with sepecular surface traced by RealTemp 200 system. ………………………………………………………………………………45
Figure 3-3 Typical surface morphology of LED with V-shaped pits on surface taken by (a) optical microscopy (X 1000) (b) AFM image (c) SEM image (X 10000) (d) TEM image. ……………………………………………………………………………………46
Figure 3-4 Typical growth procedure of a LED with V-shaped pits on surface traced by RealTemp 200 system.  …………………………………………………………………47
Figure 3-5 SEM micrographs taken from p-GaN surface of LEDs grown at different temperatures (a) 950 °C (b) 900 °C(c) 850 °C (d) 800 °C . ………………………………48
Figure 3-6 The depth of V-shaped pits taken from tilted-angle (Tilt 10°) SEM images (a) LTG p-GaN 900 °C (b) LTG p-GaN 850 °C. ……………………………………………49
Figure 3-7 Top-view SEM images of LEDs (a) LTG p-GaN grown at H2/N2 mixing ambient (b) LTG p-GaN grown at H2-free ambient.  ……………………………………50
Figure 3-8 Top-view SEM images of LEDs for LTG p-GaN grown at different growth rates(a) 0.5 µm/hr (b) 1 µm/hr. ……………………………………………………………51
Figure 3-9 Top-view SEM images of LEDs with p+ contact layer grown on the LTG p-GaN. (a) P+ contact layer grown at a flow rate of H2 :N2 = 1:1 (b) P+ contact layer grown at a H2-free ambient. ………………………………………………………………………52
Figure 3-10 Cross-section view of TEM images taken from GaN LEDs with V-shaped pits surface (a) Low-density pits (b) high-density pits.  ……………………………………53
Figure 3-11 Typical surface morphology of LED with bump islands taken by (a) optical microscopy ( X 1000 ) (b) AFM image  ( c ) SEM image ( X 10000)  (d) TEM image. ……………………………………………………………………………………54
Figure 3-12 Typical growth procedure of a LED with bump islands on surface traced by RealTemp 200 system. ……………………………………………………………………55
Figure 3-13 SEM images taken from the surface for LEDs with Mg treatment layer grown at different temperatures (a) 850 °C (b) 900 °C (c) 950 °C. ………………………………56
Figure 3-14 SEM images taken from the topmost p-GaN layer grown at different growth rates. (a)1.5µm/hr  (b) 1 µm/hr(c) 0.5 µm/hr. ……………………………………………57
Figure 3-15 SEM images of the second p-GaN layer grown at different NH3 flow. 
(a)NH3 20L (b) NH3 16L (c) NH3 12L  …………………………………………………58
Figure 3-16 SEM images of LED with bump islands on surface (a)top-view image (b) 15°-tilted SEM image. ……………………………………………………………………59
Figure 3-17 A typical cross-section TEM image showing a bump island with height of around 0.45 ~ 0.5 μm. ……………………………………………………………………60

Chapter 4:
Figure 4-1 Conventional LED structure with smooth surface. …………………………80
Figure 4-2 ESD yield relation for LEDs with different thickness of p-GaN contact layer (1000 Ǻ, 1500 Ǻ, 2000 Ǻ, 2200 Ǻ, 2500 Ǻ).Data shown here were taken in human body mode………………………………………………………………………………………81
Figure 4-3 Schematic LED structure with V-shaped pits on p-GaN contact layer. ………82
Figure 4-4 (a)light output-current (L-I) curves and (b)20 mA-EL spectra of ,LED I and LED II  Data shown here were measured from bare-chip form. ………………………83
Figure 4-5 Schematic cross-section view of an InGaN/GaN LEDs with truncated pyramids on the surface. ……………………………………………………………………………84
Figure 4-6 Top-view SEM micrographs of the InGaN/GaN LEDs (a) without and (b) with Mg-treatment process. ……………………………………………………………………85
Figure 4-7(a) External quantum efficiency as a function of injection current for InGaN/GaN LEDs without (LED I) and with Mg-treatment process (LED II). (b) Linear I-V characteristics and dynamic resistance of InGaN/GaN LEDs without and with Mg-treatment process. The inset is the dynamic resistance of the LEDs. ………………86
Figure 4-8 Typical beam patterns taken from LED I and LED II. These LEDs were all bonded on the TO 66. ……………………………………………………………………87
Figure 4-9 L-I curves for LEDs with smooth, V-shaped pits and bumped p-GaN surface LED. ………………………………………………………………………………………88
Figure 4-10 Top-view SEM images of the LEDs (a)LED-III (b)LED-II (c)LED-I. The cross-section view TEM images of LED-III, LED-II and LED-I are shown in (d), (e) and (f), respectively. …………………………………………………………………………90
Figure 4-11(a) Light output power as function of forward currents for the LEDs with p-GaN layers grown at different temperatures. (b) Measured ESD results as function of stress voltages. The values shown in the left-hand vertical axis mean the total tested device numbers(100) divided by the non-failed device numbers for a given reverse stress voltage. …………………………………………………………………………………91
Figure 4-12(a) Top-view photograph of the 1 mm×1 mm power chip LED with smooth p-GaN surface. …………………………………………………………………………92
Figure 4-12(b) Top-view photograph of the 1 mm×1 mm power chip LED with bump islands on p-GaN surface. ………………………………………………………………93
Figure 4-13 Top-view photographs of the blue and green power chip LED driven at a current of 300 mA. ………………………………………………………………………94
Figure 4-14 EL spectra of the 1 mm×1 mm green LEDs with high temperature GaN barrier layers driven at different injection currents. ………………………………………………95
Figure 4- 15(a) L-I curves of power-chip LEDs, emitting a wavelength of around 465 nm, with bump islands on p-GaN surface. These LEDs were diced into different sizes (600600,750750,10001000 m2) ……………………………………………………96
Figure 4-15(b) Linear I-V characteristics power-chip LEDs, emitting a wavelength of around 465 nm, with bump islands on p-GaN surface. These LEDs were diced into different sizes(600600,750750,10001000 m2)………………………………………97
Figure 4-16 Aging test for relative luminous intensity for power chip LEDs featuring different sizes (600600,750750,10001000 m2) with bump islands on p-GaN surface. (a) relative luminous intensity vs. aging time, (b) leakage current biased at reverse voltage of 5 V vs. aging time.  …………………………………………………………………98
Figure 4-17 L-I curves for power chip LEDs (1 ×1 mm2 )with smooth, V-shaped pits and bumped p-GaN surface.   ………………………………………………………………99
Figure 4-18 Schematic structures of GaN/sapphire-based LEDs with different chip size for figuring out the photon paths for escaping from the side wall of LED chip.  ……………………………………………………………………………………100

Chapter 5:
Figure 5-1 Schematic device structure of LED.  ………………………………………113
Figure 5-2 Typical reflectance spectra taken during the growth of LED structures with (LED-I) and without (LED-II) the SiH4-treatment process preformed on sapphire. …………………………………………………………………………………114
Figure 5-3 Optical reflectance taken from top surface (GaN/air interface) of the experimental LEDs (LED-I and LED-II). The inset shows the schematic diagram of the measurement.  …………………………………………………………………………115
Figure 5-4 surface morphology taken by optical microscopy (a) without (X50, X200, X1000) (b) with(X50, X200, X1000) SiH4-treatment process. …………………………116
Figure 5-5 Cross-section-view TEM images for the samples without (a) and with (b) the SiH4-treatment process.  ………………………………………………………………117
Figure 5-6 Typical output power-current and I-V characteristics of LED I and LED II.  ………………………………………………………………………………………118
Figure 5-7 Typical beam patterns taken from LED I and LED II. These LEDs were not encapsulated into epoxy resin. …………………………………………………………119
Figure 5-8 Typical I-V characteristics of LED I and LED II. …………………………120
                                    

Chapter 1
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Chapter 2
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Chapter 3
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Chapter 5
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